[llvm] d295a53 - [X86] Specify Undef for the registers we xor
Bill Wendling via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 9 02:06:34 PST 2022
Author: Bill Wendling
Date: 2022-02-09T02:06:12-08:00
New Revision: d295a53a9240326b371d76f6a4af995002e7ec86
URL: https://github.com/llvm/llvm-project/commit/d295a53a9240326b371d76f6a4af995002e7ec86
DIFF: https://github.com/llvm/llvm-project/commit/d295a53a9240326b371d76f6a4af995002e7ec86.diff
LOG: [X86] Specify Undef for the registers we xor
Fixes expensive check failures from D110869.
Added:
Modified:
llvm/lib/Target/X86/X86FrameLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index d0e98e50c86bd..24d920db1e8dd 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -582,7 +582,9 @@ void X86FrameLowering::emitZeroCallUsedRegs(BitVector RegsToZero,
continue;
}
- BuildMI(MBB, MBBI, DL, TII.get(XorOp), Reg).addReg(Reg).addReg(Reg);
+ BuildMI(MBB, MBBI, DL, TII.get(XorOp), Reg)
+ .addReg(Reg, RegState::Undef)
+ .addReg(Reg, RegState::Undef);
}
}
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