[PATCH] D119314: [RISCV] Add support for matching vwmaccsu from fixed vectors

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 9 00:29:27 PST 2022


craig.topper added a comment.

In D119314#3307025 <https://reviews.llvm.org/D119314#3307025>, @Chenbing.Zheng wrote:

> In D119314#3306938 <https://reviews.llvm.org/D119314#3306938>, @craig.topper wrote:
>
>> What about vwmaccus.vx?
>
> Apply this patch,it will produce vmv.v.x  and vwmaccsu.vv instead of vwmaccus.vx. May I solve it in another patch?
>
> define <2 x i16> @vwmaccus_vx_v2i16(<2 x i8>* %x, i8 %y, <2 x i16> %z) {
> ; CHECK-LABEL: vwmaccus_vx_v2i16:
> ; CHECK:       # %bb.0:
> ; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, mu
> ; CHECK-NEXT:    vle8.v v9, (a0)
> ; CHECK-NEXT:    vmv.v.x v10, a1
> ; CHECK-NEXT:    vwmaccsu.vv v8, v9, v10
> ; CHECK-NEXT:    ret
>
>   %a = load <2 x i8>, <2 x i8>* %x
>   %b = insertelement <2 x i8> poison, i8 %y, i32 0
>   %c = shufflevector <2 x i8> %b, <2 x i8> poison, <2 x i32> zeroinitializer
>   %d = sext <2 x i8> %a to <2 x i16>
>   %e = zext <2 x i8> %c to <2 x i16>
>   %f = mul <2 x i16> %d, %e
>   %g = add <2 x i16> %f, %z
>   ret <2 x i16> %g
>
> }

Don't you just need to add another isel pattern to handle it? What's preventing that being part of of this patch?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119314/new/

https://reviews.llvm.org/D119314



More information about the llvm-commits mailing list