[PATCH] D119314: [RISCV] Add support for matching vwmaccsu from fixed vectors
Chenbing.Zheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 8 22:38:01 PST 2022
Chenbing.Zheng created this revision.
Chenbing.Zheng added reviewers: craig.topper, frasercrmck, HsiangKai, arcbbb, benshi001.
Chenbing.Zheng added a project: LLVM.
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
Chenbing.Zheng requested review of this revision.
Herald added subscribers: llvm-commits, pcwang-thead, eopXD, jacquesguan, MaskRay.
Add pattern to match add and widening mul to vwmacc, and
two multipliers are sext and zext.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D119314
Files:
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmaccsu.ll
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