[PATCH] D119197: [RISCV] Pre-process integer ISD::SPLAT_VECTOR to RISCISD::VMV_V_X_VL before isel.

Zakk Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 8 22:13:35 PST 2022

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khchen added a comment.

Agree, it's a sensible approach. LGTM.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D119197/new/

https://reviews.llvm.org/D119197

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