[PATCH] D117546: [RISCV] Add patterns for vector widening floating-point fused multiply-add instructions

Jianjian Guan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 8 18:35:19 PST 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5e71bbfb6cdc: [RISCV] Add patterns for vector widening floating-point fused multiply-add… (authored by jacquesguan).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117546/new/

https://reviews.llvm.org/D117546

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vfwmacc-sdnode.ll

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