[llvm] cb0fff4 - [RISCV] Pre-commit test for D118222

[via llvm-commits]

Author: wangpc
Date: 2022-02-08T12:52:13+08:00
New Revision: cb0fff4397e7f40614e35616da893d35a31fbb4e

URL: https://github.com/llvm/llvm-project/commit/cb0fff4397e7f40614e35616da893d35a31fbb4e
DIFF: https://github.com/llvm/llvm-project/commit/cb0fff4397e7f40614e35616da893d35a31fbb4e.diff

LOG: [RISCV] Pre-commit test for D118222

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D119212

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/double-calling-conv.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/double-calling-conv.ll b/llvm/test/CodeGen/RISCV/double-calling-conv.ll
index 51434d9af3ae9..4ec95aa388f6a 100644
--- a/llvm/test/CodeGen/RISCV/double-calling-conv.ll
+++ b/llvm/test/CodeGen/RISCV/double-calling-conv.ll
@@ -142,3 +142,15 @@ define double @caller_double_stack() nounwind {
   %1 = call double @callee_double_stack(i64 1, i64 2, i64 3, i64 4, double 5.72, double 6.72)
   ret double %1
 }
+
+define double @func_return_double_undef() nounwind {
+; RV32IFD-LABEL: func_return_double_undef:
+; RV32IFD:       # %bb.0:
+; RV32IFD-NEXT:    addi sp, sp, -16
+; RV32IFD-NEXT:    fsd ft0, 8(sp)
+; RV32IFD-NEXT:    lw a0, 8(sp)
+; RV32IFD-NEXT:    lw a1, 12(sp)
+; RV32IFD-NEXT:    addi sp, sp, 16
+; RV32IFD-NEXT:    ret
+  ret double undef
+}