[PATCH] D119197: [RISCV] Pre-process integer ISD::SPLAT_VECTOR to RISCISD::VMV_V_X_VL before isel.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 7 19:08:16 PST 2022


craig.topper updated this revision to Diff 406681.
craig.topper added a comment.

Fix comment mistake. I originally tried to do integer and FP and deleted the wrong part of the comment when I switched to just integer.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119197/new/

https://reviews.llvm.org/D119197

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

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