[PATCH] D119197: [RISCV] Pre-process integer ISD::SPLAT_VECTOR to RISCISD::VFMV_V_F_VL before isel.

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:50
 
+    // Convert integer SPLAT_VECTOR to VFMV_V_F_VL to reduce isel burden.
+    if (N->getOpcode() == ISD::SPLAT_VECTOR &&
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Should be `VMV_V_X_VL`? the title seems typo too?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119197/new/

https://reviews.llvm.org/D119197