[PATCH] D118802: [AArch64][CodeGen] Always use SVE (when enabled) to lower 64-bit vector multiplies

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.

For sure the test CHECK line structure will need to be revisited but that's likely better done once some of the interdependencies like MULH are finished and we can be sure the code quality for >=128bit vectors is consistently good across all target vector lengths.


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https://reviews.llvm.org/D118802