[PATCH] D118316: [PowerPC] Materialize special ConstantFP using instructions instead of load from TOC

[Ting Wang via Phabricator via llvm-commits]

tingwang added a comment.

In D118316#3300414 <https://reviews.llvm.org/D118316#3300414>, @nemanjai wrote:

> I am wondering if you have done any performance comparison or even just latency/throughput "back-of-the-envelope" computation for this. It doesn't seem obvious to me that this is better than a CP load. The conversion is a fairly expensive instruction. Another less compelling thing to consider is that in high register pressure situations (for VMX registers), the `VSPLTISW` may cause a spill.
>
> One thing to note is that this necessarily replaces the cracked `lfs` instruction which is also expensive, so this transformation may be worthwhile. However, I wonder how this transformation would compare to stopping the conversion from double precision to single precision for constants on Power9 (i.e. return `false` from `ShouldShrinkFPConstant()` on Power9). This would of course grow the constant pool in situations where a lot of compact constants are loaded, but presumably this is a somewhat rare situation.

Thank you for looking into this. I'm planning to do performance comparison, and will check/compare the performance with stopping the conversion from double to single as you mentioned (LFS vs. LFD). I do agree the 'VSPLTISW' may cause a vector spill is a concern, and that cost is higher than CP load spill fixed point register, although this depends on register usage.

Simple calculation shows that from instruction latency perspective (P9InstrResources.td) VSPLTISW + XVCVSXWDP is 4 + 7 = 11, and CP load ADDI + ADDIS + LFS is 2 + 2 + 7 = 11, which is the same. Although CP load has memory access, its ADDIS maybe saved in consecutive CP loads. Looks like this maybe a draw, so I do need to check the real performance.


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