[PATCH] D119099: [RISCV][DAGCombiner] Custom lower ISD::ABS to sra (X, size(X)-1); sub (xor (X, Y), Y).
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 6 23:54:15 PST 2022
RKSimon added a comment.
What about just updating the default lowering?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D119099/new/
https://reviews.llvm.org/D119099
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