[llvm] b932877 - [InstCombine] Add mul(x,x) tests showing miscompile

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-02-06T19:13:16Z
New Revision: b93287754bfaaea2b15d87cd61ea153e2af69a4a

URL: https://github.com/llvm/llvm-project/commit/b93287754bfaaea2b15d87cd61ea153e2af69a4a
DIFF: https://github.com/llvm/llvm-project/commit/b93287754bfaaea2b15d87cd61ea153e2af69a4a.diff

LOG: [InstCombine] Add mul(x,x) tests showing miscompile

As raised by @efriedma on D117995 - the source must not be undef to demand any bits in mul(x,x) other than bit[1]

https://alive2.llvm.org/ce/z/Cxkjen

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/mul-masked-bits.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/mul-masked-bits.ll b/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
index 3f652ea807df0..8a056c1073824 100644
--- a/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
+++ b/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
@@ -53,6 +53,32 @@ define <4 x i1> @PR48683_vec_undef(<4 x i32> %x) {
   ret <4 x i1> %c
 }
 
+; mul(x,x) - bit[1] is 0, but if demanding the other bits the source must not be undef
+
+define i64 @combine_mul_self_demandedbits(i64 %x) {
+; CHECK-LABEL: @combine_mul_self_demandedbits(
+; CHECK-NEXT:    [[TMP1:%.*]] = mul i64 [[X:%.*]], [[X]]
+; CHECK-NEXT:    [[TMP2:%.*]] = and i64 [[TMP1]], -3
+; CHECK-NEXT:    ret i64 [[TMP2]]
+;
+  %1 = mul i64 %x, %x
+  %2 = and i64 %1, -3
+  ret i64 %2
+}
+
+define <4 x i32> @combine_mul_self_demandedbits_vector(<4 x i32> %x) {
+; CHECK-LABEL: @combine_mul_self_demandedbits_vector(
+; CHECK-NEXT:    [[TMP1:%.*]] = freeze <4 x i32> [[X:%.*]]
+; CHECK-NEXT:    [[TMP2:%.*]] = mul <4 x i32> [[TMP1]], [[TMP1]]
+; CHECK-NEXT:    [[TMP3:%.*]] = and <4 x i32> [[TMP2]], <i32 -3, i32 -3, i32 -3, i32 -3>
+; CHECK-NEXT:    ret <4 x i32> [[TMP3]]
+;
+  %1 = freeze <4 x i32> %x
+  %2 = mul <4 x i32> %1, %1
+  %3 = and <4 x i32> %2, <i32 -3, i32 -3, i32 -3, i32 -3>
+  ret <4 x i32> %3
+}
+
 define i8 @one_demanded_bit(i8 %x) {
 ; CHECK-LABEL: @one_demanded_bit(
 ; CHECK-NEXT:    [[TMP1:%.*]] = shl i8 [[X:%.*]], 6