[PATCH] D119072: [DAGCombine] Move AVG combine to SimplifyDemandBits

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:912
+                                 const TargetLowering &TLI,
+                                 const APInt &DemandedBits, unsigned Depth) {
+  assert((Op.getOpcode() == ISD::SRL || Op.getOpcode() == ISD::SRA) &&
----------------
DemandedElts?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D119072/new/

https://reviews.llvm.org/D119072