[PATCH] D119075: [DAGCombine][ARM] Custom lower smaller-than-legal MULH/AVG/ABD

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Feb 6 02:06:05 PST 2022


dmgreen created this revision.
dmgreen added reviewers: RKSimon, craig.topper, efriedma, samtebbs.
Herald added subscribers: ecnelises, hiraditya, kristof.beyls.
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MVE only has 128bit legal vectors, no 64bit vectors. There are a number of combines for nodes (MULH/AVG/ABD) that are beneficial for these smaller-than-legal vectors, and often created by the vectorizers, but are not currently transformed. There is no way to tell the target independent dag-combiner that it should, allowing the ARM backend to legalize them.

This changes the legality check in those nodes from `TLI.isOperationLegalOrCustom(Opc, VT)` (which inherently checks `isTypeLegal(VT)`) to `TLI.isOperationLegal(Opc, VT) || TLI.isOperationCustom(Opc, VT)`, which allows the backend to mark the nodes as Custom for illegal types, legalising the nodes as it requires. The actual legalisation on MVE uses any_extends and vector casts to perform the operation on a legal vector, truncating the result back to the original type.

There may be other ways to do this - let me know if there is a better way. We can do the same for AArch64 for small types but I've not done that in this same patch.


https://reviews.llvm.org/D119075

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/Thumb2/mve-vabdus.ll
  llvm/test/CodeGen/Thumb2/mve-vhadd.ll
  llvm/test/CodeGen/Thumb2/mve-vmulh.ll

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