[llvm] 6daaf5a - [X86] Add some better common check-prefixes to slow-pmulld.ll
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 5 10:56:52 PST 2022
Author: Simon Pilgrim
Date: 2022-02-05T18:56:38Z
New Revision: 6daaf5a44925592c764c59219b0024ee06317028
URL: https://github.com/llvm/llvm-project/commit/6daaf5a44925592c764c59219b0024ee06317028
DIFF: https://github.com/llvm/llvm-project/commit/6daaf5a44925592c764c59219b0024ee06317028.diff
LOG: [X86] Add some better common check-prefixes to slow-pmulld.ll
Try to reduce at least some of the duplication
Added:
Modified:
llvm/test/CodeGen/X86/slow-pmulld.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/slow-pmulld.ll b/llvm/test/CodeGen/X86/slow-pmulld.ll
index 5009056034c0a..21b143bd2fa1c 100644
--- a/llvm/test/CodeGen/X86/slow-pmulld.ll
+++ b/llvm/test/CodeGen/X86/slow-pmulld.ll
@@ -1,20 +1,20 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=CHECK32,SLM32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=CHECK64,SLM64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=CHECK32,SLOW32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=CHECK64,SLOW64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE4-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE4-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx2,+slow-pmulld | FileCheck %s --check-prefixes=AVX2-SLOW,AVX2-SLOW32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+slow-pmulld | FileCheck %s --check-prefixes=AVX2-SLOW,AVX2-SLOW64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX-32,AVX2-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX-64,AVX2-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX-32,AVX512-32,AVX512DQ-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX-64,AVX512-64,AVX512DQ-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX-32,AVX512-32,AVX512BW-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX-64,AVX512-64,AVX512BW-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX-32,AVX512-32,KNL-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX-64,AVX512-64,KNL-64
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=SLM,CHECK32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=SLM,CHECK64
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=SLOW,CHECK32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=SLOW,CHECK64
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE4,SSE4-32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE4,SSE4-64
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx2,+slow-pmulld | FileCheck %s --check-prefixes=AVX2,AVX2-SLOW,AVX2-SLOW32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+slow-pmulld | FileCheck %s --check-prefixes=AVX2,AVX2-SLOW,AVX2-SLOW64
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX2-32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX2-64
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX512-32,AVX512DQ-32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX512-64,AVX512DQ-64
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX512-32,AVX512BW-32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX512-64,AVX512BW-64
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX512-32,KNL-32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX512-64,KNL-64
; Make sure that the slow-pmulld feature can be used without SSE4.1.
; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont -mattr=-sse4.1
@@ -111,65 +111,35 @@ define <4 x i32> @test_mul_v4i32_v4i8(<4 x i8> %A) {
}
define <8 x i32> @test_mul_v8i32_v8i8(<8 x i8> %A) {
-; SLM32-LABEL: test_mul_v8i32_v8i8:
-; SLM32: # %bb.0:
-; SLM32-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SLM32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM32-NEXT: pmaddwd %xmm2, %xmm0
-; SLM32-NEXT: pmaddwd %xmm2, %xmm1
-; SLM32-NEXT: retl
-;
-; SLM64-LABEL: test_mul_v8i32_v8i8:
-; SLM64: # %bb.0:
-; SLM64-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SLM64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM64-NEXT: pmaddwd %xmm2, %xmm0
-; SLM64-NEXT: pmaddwd %xmm2, %xmm1
-; SLM64-NEXT: retq
-;
-; SLOW32-LABEL: test_mul_v8i32_v8i8:
-; SLOW32: # %bb.0:
-; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLOW32-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SLOW32-NEXT: pmaddwd %xmm2, %xmm0
-; SLOW32-NEXT: pmaddwd %xmm2, %xmm1
-; SLOW32-NEXT: retl
-;
-; SLOW64-LABEL: test_mul_v8i32_v8i8:
-; SLOW64: # %bb.0:
-; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLOW64-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SLOW64-NEXT: pmaddwd %xmm2, %xmm0
-; SLOW64-NEXT: pmaddwd %xmm2, %xmm1
-; SLOW64-NEXT: retq
-;
-; SSE4-32-LABEL: test_mul_v8i32_v8i8:
-; SSE4-32: # %bb.0:
-; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SSE4-32-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SSE4-32-NEXT: pmaddwd %xmm2, %xmm0
-; SSE4-32-NEXT: pmaddwd %xmm2, %xmm1
-; SSE4-32-NEXT: retl
-;
-; SSE4-64-LABEL: test_mul_v8i32_v8i8:
-; SSE4-64: # %bb.0:
-; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SSE4-64-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SSE4-64-NEXT: pmaddwd %xmm2, %xmm0
-; SSE4-64-NEXT: pmaddwd %xmm2, %xmm1
-; SSE4-64-NEXT: retq
+; SLM-LABEL: test_mul_v8i32_v8i8:
+; SLM: # %bb.0:
+; SLM-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
+; SLM-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLM-NEXT: pmaddwd %xmm2, %xmm0
+; SLM-NEXT: pmaddwd %xmm2, %xmm1
+; SLM-NEXT: ret{{[l|q]}}
+;
+; SLOW-LABEL: test_mul_v8i32_v8i8:
+; SLOW: # %bb.0:
+; SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SLOW-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
+; SLOW-NEXT: pmaddwd %xmm2, %xmm0
+; SLOW-NEXT: pmaddwd %xmm2, %xmm1
+; SLOW-NEXT: ret{{[l|q]}}
+;
+; SSE4-LABEL: test_mul_v8i32_v8i8:
+; SSE4: # %bb.0:
+; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SSE4-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
+; SSE4-NEXT: pmaddwd %xmm2, %xmm0
+; SSE4-NEXT: pmaddwd %xmm2, %xmm1
+; SSE4-NEXT: ret{{[l|q]}}
;
; AVX2-SLOW32-LABEL: test_mul_v8i32_v8i8:
; AVX2-SLOW32: # %bb.0:
@@ -238,101 +208,53 @@ define <8 x i32> @test_mul_v8i32_v8i8(<8 x i8> %A) {
}
define <16 x i32> @test_mul_v16i32_v16i8(<16 x i8> %A) {
-; SLM32-LABEL: test_mul_v16i32_v16i8:
-; SLM32: # %bb.0:
-; SLM32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SLM32-NEXT: movdqa {{.*#+}} xmm5 = [18778,0,18778,0,18778,0,18778,0]
-; SLM32-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
-; SLM32-NEXT: pmaddwd %xmm5, %xmm0
-; SLM32-NEXT: pmaddwd %xmm5, %xmm1
-; SLM32-NEXT: pmaddwd %xmm5, %xmm2
-; SLM32-NEXT: pmaddwd %xmm5, %xmm3
-; SLM32-NEXT: retl
-;
-; SLM64-LABEL: test_mul_v16i32_v16i8:
-; SLM64: # %bb.0:
-; SLM64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SLM64-NEXT: movdqa {{.*#+}} xmm5 = [18778,0,18778,0,18778,0,18778,0]
-; SLM64-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
-; SLM64-NEXT: pmaddwd %xmm5, %xmm0
-; SLM64-NEXT: pmaddwd %xmm5, %xmm1
-; SLM64-NEXT: pmaddwd %xmm5, %xmm2
-; SLM64-NEXT: pmaddwd %xmm5, %xmm3
-; SLM64-NEXT: retq
-;
-; SLOW32-LABEL: test_mul_v16i32_v16i8:
-; SLOW32: # %bb.0:
-; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLOW32-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
-; SLOW32-NEXT: pmaddwd %xmm4, %xmm0
-; SLOW32-NEXT: pmaddwd %xmm4, %xmm1
-; SLOW32-NEXT: pmaddwd %xmm4, %xmm2
-; SLOW32-NEXT: pmaddwd %xmm4, %xmm3
-; SLOW32-NEXT: retl
-;
-; SLOW64-LABEL: test_mul_v16i32_v16i8:
-; SLOW64: # %bb.0:
-; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLOW64-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
-; SLOW64-NEXT: pmaddwd %xmm4, %xmm0
-; SLOW64-NEXT: pmaddwd %xmm4, %xmm1
-; SLOW64-NEXT: pmaddwd %xmm4, %xmm2
-; SLOW64-NEXT: pmaddwd %xmm4, %xmm3
-; SLOW64-NEXT: retq
-;
-; SSE4-32-LABEL: test_mul_v16i32_v16i8:
-; SSE4-32: # %bb.0:
-; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SSE4-32-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
-; SSE4-32-NEXT: pmaddwd %xmm4, %xmm0
-; SSE4-32-NEXT: pmaddwd %xmm4, %xmm1
-; SSE4-32-NEXT: pmaddwd %xmm4, %xmm2
-; SSE4-32-NEXT: pmaddwd %xmm4, %xmm3
-; SSE4-32-NEXT: retl
-;
-; SSE4-64-LABEL: test_mul_v16i32_v16i8:
-; SSE4-64: # %bb.0:
-; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SSE4-64-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
-; SSE4-64-NEXT: pmaddwd %xmm4, %xmm0
-; SSE4-64-NEXT: pmaddwd %xmm4, %xmm1
-; SSE4-64-NEXT: pmaddwd %xmm4, %xmm2
-; SSE4-64-NEXT: pmaddwd %xmm4, %xmm3
-; SSE4-64-NEXT: retq
+; SLM-LABEL: test_mul_v16i32_v16i8:
+; SLM: # %bb.0:
+; SLM-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
+; SLM-NEXT: movdqa {{.*#+}} xmm5 = [18778,0,18778,0,18778,0,18778,0]
+; SLM-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLM-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
+; SLM-NEXT: pmaddwd %xmm5, %xmm0
+; SLM-NEXT: pmaddwd %xmm5, %xmm1
+; SLM-NEXT: pmaddwd %xmm5, %xmm2
+; SLM-NEXT: pmaddwd %xmm5, %xmm3
+; SLM-NEXT: ret{{[l|q]}}
+;
+; SLOW-LABEL: test_mul_v16i32_v16i8:
+; SLOW: # %bb.0:
+; SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SLOW-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
+; SLOW-NEXT: pmaddwd %xmm4, %xmm0
+; SLOW-NEXT: pmaddwd %xmm4, %xmm1
+; SLOW-NEXT: pmaddwd %xmm4, %xmm2
+; SLOW-NEXT: pmaddwd %xmm4, %xmm3
+; SLOW-NEXT: ret{{[l|q]}}
+;
+; SSE4-LABEL: test_mul_v16i32_v16i8:
+; SSE4: # %bb.0:
+; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SSE4-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
+; SSE4-NEXT: pmaddwd %xmm4, %xmm0
+; SSE4-NEXT: pmaddwd %xmm4, %xmm1
+; SSE4-NEXT: pmaddwd %xmm4, %xmm2
+; SSE4-NEXT: pmaddwd %xmm4, %xmm3
+; SSE4-NEXT: ret{{[l|q]}}
;
; AVX2-SLOW-LABEL: test_mul_v16i32_v16i8:
; AVX2-SLOW: # %bb.0:
@@ -405,23 +327,23 @@ define <16 x i32> @test_mul_v16i32_v16i8(<16 x i8> %A) {
}
define <4 x i32> @test_mul_v4i32_v4i16(<4 x i16> %A) {
-; CHECK32-LABEL: test_mul_v4i32_v4i16:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u>
-; CHECK32-NEXT: movdqa %xmm0, %xmm2
-; CHECK32-NEXT: pmulhuw %xmm1, %xmm2
-; CHECK32-NEXT: pmullw %xmm1, %xmm0
-; CHECK32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; CHECK32-NEXT: retl
-;
-; CHECK64-LABEL: test_mul_v4i32_v4i16:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u>
-; CHECK64-NEXT: movdqa %xmm0, %xmm2
-; CHECK64-NEXT: pmulhuw %xmm1, %xmm2
-; CHECK64-NEXT: pmullw %xmm1, %xmm0
-; CHECK64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; CHECK64-NEXT: retq
+; SLM-LABEL: test_mul_v4i32_v4i16:
+; SLM: # %bb.0:
+; SLM-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u>
+; SLM-NEXT: movdqa %xmm0, %xmm2
+; SLM-NEXT: pmulhuw %xmm1, %xmm2
+; SLM-NEXT: pmullw %xmm1, %xmm0
+; SLM-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SLM-NEXT: ret{{[l|q]}}
+;
+; SLOW-LABEL: test_mul_v4i32_v4i16:
+; SLOW: # %bb.0:
+; SLOW-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u>
+; SLOW-NEXT: movdqa %xmm0, %xmm2
+; SLOW-NEXT: pmulhuw %xmm1, %xmm2
+; SLOW-NEXT: pmullw %xmm1, %xmm0
+; SLOW-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SLOW-NEXT: ret{{[l|q]}}
;
; SSE4-32-LABEL: test_mul_v4i32_v4i16:
; SSE4-32: # %bb.0:
@@ -462,71 +384,38 @@ define <4 x i32> @test_mul_v4i32_v4i16(<4 x i16> %A) {
}
define <8 x i32> @test_mul_v8i32_v8i16(<8 x i16> %A) {
-; SLM32-LABEL: test_mul_v8i32_v8i16:
-; SLM32: # %bb.0:
-; SLM32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; SLM32-NEXT: movdqa %xmm0, %xmm2
-; SLM32-NEXT: pmulhuw %xmm1, %xmm2
-; SLM32-NEXT: pmullw %xmm0, %xmm1
-; SLM32-NEXT: movdqa %xmm1, %xmm0
-; SLM32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
-; SLM32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SLM32-NEXT: retl
-;
-; SLM64-LABEL: test_mul_v8i32_v8i16:
-; SLM64: # %bb.0:
-; SLM64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; SLM64-NEXT: movdqa %xmm0, %xmm2
-; SLM64-NEXT: pmulhuw %xmm1, %xmm2
-; SLM64-NEXT: pmullw %xmm0, %xmm1
-; SLM64-NEXT: movdqa %xmm1, %xmm0
-; SLM64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
-; SLM64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SLM64-NEXT: retq
-;
-; SLOW32-LABEL: test_mul_v8i32_v8i16:
-; SLOW32: # %bb.0:
-; SLOW32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; SLOW32-NEXT: movdqa %xmm0, %xmm2
-; SLOW32-NEXT: pmulhuw %xmm1, %xmm2
-; SLOW32-NEXT: pmullw %xmm0, %xmm1
-; SLOW32-NEXT: movdqa %xmm1, %xmm0
-; SLOW32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SLOW32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
-; SLOW32-NEXT: retl
-;
-; SLOW64-LABEL: test_mul_v8i32_v8i16:
-; SLOW64: # %bb.0:
-; SLOW64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; SLOW64-NEXT: movdqa %xmm0, %xmm2
-; SLOW64-NEXT: pmulhuw %xmm1, %xmm2
-; SLOW64-NEXT: pmullw %xmm0, %xmm1
-; SLOW64-NEXT: movdqa %xmm1, %xmm0
-; SLOW64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SLOW64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
-; SLOW64-NEXT: retq
-;
-; SSE4-32-LABEL: test_mul_v8i32_v8i16:
-; SSE4-32: # %bb.0:
-; SSE4-32-NEXT: pxor %xmm1, %xmm1
-; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
-; SSE4-32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
-; SSE4-32-NEXT: pmulld %xmm1, %xmm2
-; SSE4-32-NEXT: pmulld %xmm0, %xmm1
-; SSE4-32-NEXT: movdqa %xmm2, %xmm0
-; SSE4-32-NEXT: retl
-;
-; SSE4-64-LABEL: test_mul_v8i32_v8i16:
-; SSE4-64: # %bb.0:
-; SSE4-64-NEXT: pxor %xmm1, %xmm1
-; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
-; SSE4-64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
-; SSE4-64-NEXT: pmulld %xmm1, %xmm2
-; SSE4-64-NEXT: pmulld %xmm0, %xmm1
-; SSE4-64-NEXT: movdqa %xmm2, %xmm0
-; SSE4-64-NEXT: retq
+; SLM-LABEL: test_mul_v8i32_v8i16:
+; SLM: # %bb.0:
+; SLM-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
+; SLM-NEXT: movdqa %xmm0, %xmm2
+; SLM-NEXT: pmulhuw %xmm1, %xmm2
+; SLM-NEXT: pmullw %xmm0, %xmm1
+; SLM-NEXT: movdqa %xmm1, %xmm0
+; SLM-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
+; SLM-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SLM-NEXT: ret{{[l|q]}}
+;
+; SLOW-LABEL: test_mul_v8i32_v8i16:
+; SLOW: # %bb.0:
+; SLOW-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
+; SLOW-NEXT: movdqa %xmm0, %xmm2
+; SLOW-NEXT: pmulhuw %xmm1, %xmm2
+; SLOW-NEXT: pmullw %xmm0, %xmm1
+; SLOW-NEXT: movdqa %xmm1, %xmm0
+; SLOW-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SLOW-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
+; SLOW-NEXT: ret{{[l|q]}}
+;
+; SSE4-LABEL: test_mul_v8i32_v8i16:
+; SSE4: # %bb.0:
+; SSE4-NEXT: pxor %xmm1, %xmm1
+; SSE4-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SSE4-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; SSE4-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
+; SSE4-NEXT: pmulld %xmm1, %xmm2
+; SSE4-NEXT: pmulld %xmm0, %xmm1
+; SSE4-NEXT: movdqa %xmm2, %xmm0
+; SSE4-NEXT: ret{{[l|q]}}
;
; AVX2-SLOW-LABEL: test_mul_v8i32_v8i16:
; AVX2-SLOW: # %bb.0:
@@ -557,113 +446,59 @@ define <8 x i32> @test_mul_v8i32_v8i16(<8 x i16> %A) {
}
define <16 x i32> @test_mul_v16i32_v16i16(<16 x i16> %A) {
-; SLM32-LABEL: test_mul_v16i32_v16i16:
-; SLM32: # %bb.0:
-; SLM32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; SLM32-NEXT: movdqa %xmm0, %xmm4
-; SLM32-NEXT: movdqa %xmm0, %xmm2
-; SLM32-NEXT: movdqa %xmm1, %xmm5
-; SLM32-NEXT: pmullw %xmm3, %xmm4
-; SLM32-NEXT: pmulhuw %xmm3, %xmm2
-; SLM32-NEXT: pmulhuw %xmm3, %xmm5
-; SLM32-NEXT: pmullw %xmm1, %xmm3
-; SLM32-NEXT: movdqa %xmm4, %xmm0
-; SLM32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
-; SLM32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SLM32-NEXT: movdqa %xmm3, %xmm2
-; SLM32-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
-; SLM32-NEXT: movdqa %xmm4, %xmm1
-; SLM32-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
-; SLM32-NEXT: retl
-;
-; SLM64-LABEL: test_mul_v16i32_v16i16:
-; SLM64: # %bb.0:
-; SLM64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; SLM64-NEXT: movdqa %xmm0, %xmm4
-; SLM64-NEXT: movdqa %xmm0, %xmm2
-; SLM64-NEXT: movdqa %xmm1, %xmm5
-; SLM64-NEXT: pmullw %xmm3, %xmm4
-; SLM64-NEXT: pmulhuw %xmm3, %xmm2
-; SLM64-NEXT: pmulhuw %xmm3, %xmm5
-; SLM64-NEXT: pmullw %xmm1, %xmm3
-; SLM64-NEXT: movdqa %xmm4, %xmm0
-; SLM64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
-; SLM64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SLM64-NEXT: movdqa %xmm3, %xmm2
-; SLM64-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
-; SLM64-NEXT: movdqa %xmm4, %xmm1
-; SLM64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
-; SLM64-NEXT: retq
-;
-; SLOW32-LABEL: test_mul_v16i32_v16i16:
-; SLOW32: # %bb.0:
-; SLOW32-NEXT: movdqa %xmm0, %xmm4
-; SLOW32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; SLOW32-NEXT: movdqa %xmm0, %xmm2
-; SLOW32-NEXT: pmulhuw %xmm3, %xmm2
-; SLOW32-NEXT: pmullw %xmm3, %xmm4
-; SLOW32-NEXT: movdqa %xmm4, %xmm0
-; SLOW32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SLOW32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
-; SLOW32-NEXT: movdqa %xmm1, %xmm5
-; SLOW32-NEXT: pmulhuw %xmm3, %xmm5
-; SLOW32-NEXT: pmullw %xmm1, %xmm3
-; SLOW32-NEXT: movdqa %xmm3, %xmm2
-; SLOW32-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
-; SLOW32-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
-; SLOW32-NEXT: movdqa %xmm4, %xmm1
-; SLOW32-NEXT: retl
-;
-; SLOW64-LABEL: test_mul_v16i32_v16i16:
-; SLOW64: # %bb.0:
-; SLOW64-NEXT: movdqa %xmm0, %xmm4
-; SLOW64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; SLOW64-NEXT: movdqa %xmm0, %xmm2
-; SLOW64-NEXT: pmulhuw %xmm3, %xmm2
-; SLOW64-NEXT: pmullw %xmm3, %xmm4
-; SLOW64-NEXT: movdqa %xmm4, %xmm0
-; SLOW64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
-; SLOW64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
-; SLOW64-NEXT: movdqa %xmm1, %xmm5
-; SLOW64-NEXT: pmulhuw %xmm3, %xmm5
-; SLOW64-NEXT: pmullw %xmm1, %xmm3
-; SLOW64-NEXT: movdqa %xmm3, %xmm2
-; SLOW64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
-; SLOW64-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
-; SLOW64-NEXT: movdqa %xmm4, %xmm1
-; SLOW64-NEXT: retq
-;
-; SSE4-32-LABEL: test_mul_v16i32_v16i16:
-; SSE4-32: # %bb.0:
-; SSE4-32-NEXT: movdqa %xmm0, %xmm4
-; SSE4-32-NEXT: pxor %xmm3, %xmm3
-; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
-; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
-; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; SSE4-32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
-; SSE4-32-NEXT: pmulld %xmm3, %xmm0
-; SSE4-32-NEXT: pmulld %xmm3, %xmm4
-; SSE4-32-NEXT: pmulld %xmm3, %xmm2
-; SSE4-32-NEXT: pmulld %xmm1, %xmm3
-; SSE4-32-NEXT: movdqa %xmm4, %xmm1
-; SSE4-32-NEXT: retl
-;
-; SSE4-64-LABEL: test_mul_v16i32_v16i16:
-; SSE4-64: # %bb.0:
-; SSE4-64-NEXT: movdqa %xmm0, %xmm4
-; SSE4-64-NEXT: pxor %xmm3, %xmm3
-; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
-; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
-; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; SSE4-64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
-; SSE4-64-NEXT: pmulld %xmm3, %xmm0
-; SSE4-64-NEXT: pmulld %xmm3, %xmm4
-; SSE4-64-NEXT: pmulld %xmm3, %xmm2
-; SSE4-64-NEXT: pmulld %xmm1, %xmm3
-; SSE4-64-NEXT: movdqa %xmm4, %xmm1
-; SSE4-64-NEXT: retq
+; SLM-LABEL: test_mul_v16i32_v16i16:
+; SLM: # %bb.0:
+; SLM-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778,18778,18778,18778,18778]
+; SLM-NEXT: movdqa %xmm0, %xmm4
+; SLM-NEXT: movdqa %xmm0, %xmm2
+; SLM-NEXT: movdqa %xmm1, %xmm5
+; SLM-NEXT: pmullw %xmm3, %xmm4
+; SLM-NEXT: pmulhuw %xmm3, %xmm2
+; SLM-NEXT: pmulhuw %xmm3, %xmm5
+; SLM-NEXT: pmullw %xmm1, %xmm3
+; SLM-NEXT: movdqa %xmm4, %xmm0
+; SLM-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
+; SLM-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SLM-NEXT: movdqa %xmm3, %xmm2
+; SLM-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
+; SLM-NEXT: movdqa %xmm4, %xmm1
+; SLM-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
+; SLM-NEXT: ret{{[l|q]}}
+;
+; SLOW-LABEL: test_mul_v16i32_v16i16:
+; SLOW: # %bb.0:
+; SLOW-NEXT: movdqa %xmm0, %xmm4
+; SLOW-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778,18778,18778,18778,18778]
+; SLOW-NEXT: movdqa %xmm0, %xmm2
+; SLOW-NEXT: pmulhuw %xmm3, %xmm2
+; SLOW-NEXT: pmullw %xmm3, %xmm4
+; SLOW-NEXT: movdqa %xmm4, %xmm0
+; SLOW-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SLOW-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
+; SLOW-NEXT: movdqa %xmm1, %xmm5
+; SLOW-NEXT: pmulhuw %xmm3, %xmm5
+; SLOW-NEXT: pmullw %xmm1, %xmm3
+; SLOW-NEXT: movdqa %xmm3, %xmm2
+; SLOW-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
+; SLOW-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
+; SLOW-NEXT: movdqa %xmm4, %xmm1
+; SLOW-NEXT: ret{{[l|q]}}
+;
+; SSE4-LABEL: test_mul_v16i32_v16i16:
+; SSE4: # %bb.0:
+; SSE4-NEXT: movdqa %xmm0, %xmm4
+; SSE4-NEXT: pxor %xmm3, %xmm3
+; SSE4-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; SSE4-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
+; SSE4-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SSE4-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; SSE4-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
+; SSE4-NEXT: pmulld %xmm3, %xmm0
+; SSE4-NEXT: pmulld %xmm3, %xmm4
+; SSE4-NEXT: pmulld %xmm3, %xmm2
+; SSE4-NEXT: pmulld %xmm1, %xmm3
+; SSE4-NEXT: movdqa %xmm4, %xmm1
+; SSE4-NEXT: ret{{[l|q]}}
;
; AVX2-SLOW-LABEL: test_mul_v16i32_v16i16:
; AVX2-SLOW: # %bb.0:
@@ -812,65 +647,35 @@ define <4 x i32> @test_mul_v4i32_v4i8_minsize(<4 x i8> %A) minsize {
}
define <8 x i32> @test_mul_v8i32_v8i8_minsize(<8 x i8> %A) minsize {
-; SLM32-LABEL: test_mul_v8i32_v8i8_minsize:
-; SLM32: # %bb.0:
-; SLM32-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SLM32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM32-NEXT: pmaddwd %xmm2, %xmm0
-; SLM32-NEXT: pmaddwd %xmm2, %xmm1
-; SLM32-NEXT: retl
-;
-; SLM64-LABEL: test_mul_v8i32_v8i8_minsize:
-; SLM64: # %bb.0:
-; SLM64-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SLM64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM64-NEXT: pmaddwd %xmm2, %xmm0
-; SLM64-NEXT: pmaddwd %xmm2, %xmm1
-; SLM64-NEXT: retq
-;
-; SLOW32-LABEL: test_mul_v8i32_v8i8_minsize:
-; SLOW32: # %bb.0:
-; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLOW32-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SLOW32-NEXT: pmaddwd %xmm2, %xmm0
-; SLOW32-NEXT: pmaddwd %xmm2, %xmm1
-; SLOW32-NEXT: retl
-;
-; SLOW64-LABEL: test_mul_v8i32_v8i8_minsize:
-; SLOW64: # %bb.0:
-; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLOW64-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SLOW64-NEXT: pmaddwd %xmm2, %xmm0
-; SLOW64-NEXT: pmaddwd %xmm2, %xmm1
-; SLOW64-NEXT: retq
-;
-; SSE4-32-LABEL: test_mul_v8i32_v8i8_minsize:
-; SSE4-32: # %bb.0:
-; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SSE4-32-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SSE4-32-NEXT: pmaddwd %xmm2, %xmm0
-; SSE4-32-NEXT: pmaddwd %xmm2, %xmm1
-; SSE4-32-NEXT: retl
-;
-; SSE4-64-LABEL: test_mul_v8i32_v8i8_minsize:
-; SSE4-64: # %bb.0:
-; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SSE4-64-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
-; SSE4-64-NEXT: pmaddwd %xmm2, %xmm0
-; SSE4-64-NEXT: pmaddwd %xmm2, %xmm1
-; SSE4-64-NEXT: retq
+; SLM-LABEL: test_mul_v8i32_v8i8_minsize:
+; SLM: # %bb.0:
+; SLM-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
+; SLM-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLM-NEXT: pmaddwd %xmm2, %xmm0
+; SLM-NEXT: pmaddwd %xmm2, %xmm1
+; SLM-NEXT: ret{{[l|q]}}
+;
+; SLOW-LABEL: test_mul_v8i32_v8i8_minsize:
+; SLOW: # %bb.0:
+; SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SLOW-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
+; SLOW-NEXT: pmaddwd %xmm2, %xmm0
+; SLOW-NEXT: pmaddwd %xmm2, %xmm1
+; SLOW-NEXT: ret{{[l|q]}}
+;
+; SSE4-LABEL: test_mul_v8i32_v8i8_minsize:
+; SSE4: # %bb.0:
+; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SSE4-NEXT: movdqa {{.*#+}} xmm2 = [18778,0,18778,0,18778,0,18778,0]
+; SSE4-NEXT: pmaddwd %xmm2, %xmm0
+; SSE4-NEXT: pmaddwd %xmm2, %xmm1
+; SSE4-NEXT: ret{{[l|q]}}
;
; AVX2-SLOW32-LABEL: test_mul_v8i32_v8i8_minsize:
; AVX2-SLOW32: # %bb.0:
@@ -939,101 +744,53 @@ define <8 x i32> @test_mul_v8i32_v8i8_minsize(<8 x i8> %A) minsize {
}
define <16 x i32> @test_mul_v16i32_v16i8_minsize(<16 x i8> %A) minsize {
-; SLM32-LABEL: test_mul_v16i32_v16i8_minsize:
-; SLM32: # %bb.0:
-; SLM32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SLM32-NEXT: movdqa {{.*#+}} xmm5 = [18778,0,18778,0,18778,0,18778,0]
-; SLM32-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
-; SLM32-NEXT: pmaddwd %xmm5, %xmm0
-; SLM32-NEXT: pmaddwd %xmm5, %xmm1
-; SLM32-NEXT: pmaddwd %xmm5, %xmm2
-; SLM32-NEXT: pmaddwd %xmm5, %xmm3
-; SLM32-NEXT: retl
-;
-; SLM64-LABEL: test_mul_v16i32_v16i8_minsize:
-; SLM64: # %bb.0:
-; SLM64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SLM64-NEXT: movdqa {{.*#+}} xmm5 = [18778,0,18778,0,18778,0,18778,0]
-; SLM64-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLM64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
-; SLM64-NEXT: pmaddwd %xmm5, %xmm0
-; SLM64-NEXT: pmaddwd %xmm5, %xmm1
-; SLM64-NEXT: pmaddwd %xmm5, %xmm2
-; SLM64-NEXT: pmaddwd %xmm5, %xmm3
-; SLM64-NEXT: retq
-;
-; SLOW32-LABEL: test_mul_v16i32_v16i8_minsize:
-; SLOW32: # %bb.0:
-; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLOW32-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
-; SLOW32-NEXT: pmaddwd %xmm4, %xmm0
-; SLOW32-NEXT: pmaddwd %xmm4, %xmm1
-; SLOW32-NEXT: pmaddwd %xmm4, %xmm2
-; SLOW32-NEXT: pmaddwd %xmm4, %xmm3
-; SLOW32-NEXT: retl
-;
-; SLOW64-LABEL: test_mul_v16i32_v16i8_minsize:
-; SLOW64: # %bb.0:
-; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SLOW64-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
-; SLOW64-NEXT: pmaddwd %xmm4, %xmm0
-; SLOW64-NEXT: pmaddwd %xmm4, %xmm1
-; SLOW64-NEXT: pmaddwd %xmm4, %xmm2
-; SLOW64-NEXT: pmaddwd %xmm4, %xmm3
-; SLOW64-NEXT: retq
-;
-; SSE4-32-LABEL: test_mul_v16i32_v16i8_minsize:
-; SSE4-32: # %bb.0:
-; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SSE4-32-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
-; SSE4-32-NEXT: pmaddwd %xmm4, %xmm0
-; SSE4-32-NEXT: pmaddwd %xmm4, %xmm1
-; SSE4-32-NEXT: pmaddwd %xmm4, %xmm2
-; SSE4-32-NEXT: pmaddwd %xmm4, %xmm3
-; SSE4-32-NEXT: retl
-;
-; SSE4-64-LABEL: test_mul_v16i32_v16i8_minsize:
-; SSE4-64: # %bb.0:
-; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
-; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
-; SSE4-64-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
-; SSE4-64-NEXT: pmaddwd %xmm4, %xmm0
-; SSE4-64-NEXT: pmaddwd %xmm4, %xmm1
-; SSE4-64-NEXT: pmaddwd %xmm4, %xmm2
-; SSE4-64-NEXT: pmaddwd %xmm4, %xmm3
-; SSE4-64-NEXT: retq
+; SLM-LABEL: test_mul_v16i32_v16i8_minsize:
+; SLM: # %bb.0:
+; SLM-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
+; SLM-NEXT: movdqa {{.*#+}} xmm5 = [18778,0,18778,0,18778,0,18778,0]
+; SLM-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,1,1]
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLM-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLM-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
+; SLM-NEXT: pmaddwd %xmm5, %xmm0
+; SLM-NEXT: pmaddwd %xmm5, %xmm1
+; SLM-NEXT: pmaddwd %xmm5, %xmm2
+; SLM-NEXT: pmaddwd %xmm5, %xmm3
+; SLM-NEXT: ret{{[l|q]}}
+;
+; SLOW-LABEL: test_mul_v16i32_v16i8_minsize:
+; SLOW: # %bb.0:
+; SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SLOW-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SLOW-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
+; SLOW-NEXT: pmaddwd %xmm4, %xmm0
+; SLOW-NEXT: pmaddwd %xmm4, %xmm1
+; SLOW-NEXT: pmaddwd %xmm4, %xmm2
+; SLOW-NEXT: pmaddwd %xmm4, %xmm3
+; SLOW-NEXT: ret{{[l|q]}}
+;
+; SSE4-LABEL: test_mul_v16i32_v16i8_minsize:
+; SSE4: # %bb.0:
+; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE4-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
+; SSE4-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
+; SSE4-NEXT: movdqa {{.*#+}} xmm4 = [18778,0,18778,0,18778,0,18778,0]
+; SSE4-NEXT: pmaddwd %xmm4, %xmm0
+; SSE4-NEXT: pmaddwd %xmm4, %xmm1
+; SSE4-NEXT: pmaddwd %xmm4, %xmm2
+; SSE4-NEXT: pmaddwd %xmm4, %xmm3
+; SSE4-NEXT: ret{{[l|q]}}
;
; AVX2-SLOW-LABEL: test_mul_v16i32_v16i8_minsize:
; AVX2-SLOW: # %bb.0:
@@ -1130,197 +887,110 @@ define <4 x i32> @test_mul_v4i32_v4i16_minsize(<4 x i16> %A) minsize {
; SSE4-64-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE4-64-NEXT: retq
;
-; AVX2-SLOW-LABEL: test_mul_v4i32_v4i16_minsize:
-; AVX2-SLOW: # %bb.0:
-; AVX2-SLOW-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; AVX2-SLOW-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778]
-; AVX2-SLOW-NEXT: vpmulld %xmm1, %xmm0, %xmm0
-; AVX2-SLOW-NEXT: ret{{[l|q]}}
-;
-; AVX-32-LABEL: test_mul_v4i32_v4i16_minsize:
-; AVX-32: # %bb.0:
-; AVX-32-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; AVX-32-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778]
-; AVX-32-NEXT: vpmulld %xmm1, %xmm0, %xmm0
-; AVX-32-NEXT: retl
-;
-; AVX-64-LABEL: test_mul_v4i32_v4i16_minsize:
-; AVX-64: # %bb.0:
-; AVX-64-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; AVX-64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778]
-; AVX-64-NEXT: vpmulld %xmm1, %xmm0, %xmm0
-; AVX-64-NEXT: retq
+; AVX2-LABEL: test_mul_v4i32_v4i16_minsize:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778]
+; AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: ret{{[l|q]}}
%z = zext <4 x i16> %A to <4 x i32>
%m = mul nuw nsw <4 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778>
ret <4 x i32> %m
}
define <8 x i32> @test_mul_v8i32_v8i16_minsize(<8 x i16> %A) minsize {
-; CHECK32-LABEL: test_mul_v8i32_v8i16_minsize:
-; CHECK32: # %bb.0:
-; CHECK32-NEXT: pxor %xmm1, %xmm1
-; CHECK32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; CHECK32-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
-; CHECK32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
-; CHECK32-NEXT: pmulld %xmm1, %xmm2
-; CHECK32-NEXT: pmulld %xmm0, %xmm1
-; CHECK32-NEXT: movdqa %xmm2, %xmm0
-; CHECK32-NEXT: retl
-;
-; CHECK64-LABEL: test_mul_v8i32_v8i16_minsize:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: pxor %xmm1, %xmm1
-; CHECK64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; CHECK64-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
-; CHECK64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
-; CHECK64-NEXT: pmulld %xmm1, %xmm2
-; CHECK64-NEXT: pmulld %xmm0, %xmm1
-; CHECK64-NEXT: movdqa %xmm2, %xmm0
-; CHECK64-NEXT: retq
-;
-; SSE4-32-LABEL: test_mul_v8i32_v8i16_minsize:
-; SSE4-32: # %bb.0:
-; SSE4-32-NEXT: pxor %xmm1, %xmm1
-; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
-; SSE4-32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
-; SSE4-32-NEXT: pmulld %xmm1, %xmm2
-; SSE4-32-NEXT: pmulld %xmm0, %xmm1
-; SSE4-32-NEXT: movdqa %xmm2, %xmm0
-; SSE4-32-NEXT: retl
-;
-; SSE4-64-LABEL: test_mul_v8i32_v8i16_minsize:
-; SSE4-64: # %bb.0:
-; SSE4-64-NEXT: pxor %xmm1, %xmm1
-; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
-; SSE4-64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
-; SSE4-64-NEXT: pmulld %xmm1, %xmm2
-; SSE4-64-NEXT: pmulld %xmm0, %xmm1
-; SSE4-64-NEXT: movdqa %xmm2, %xmm0
-; SSE4-64-NEXT: retq
-;
-; AVX2-SLOW-LABEL: test_mul_v8i32_v8i16_minsize:
-; AVX2-SLOW: # %bb.0:
-; AVX2-SLOW-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
-; AVX2-SLOW-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; AVX2-SLOW-NEXT: vpmulld %ymm1, %ymm0, %ymm0
-; AVX2-SLOW-NEXT: ret{{[l|q]}}
-;
-; AVX-32-LABEL: test_mul_v8i32_v8i16_minsize:
-; AVX-32: # %bb.0:
-; AVX-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
-; AVX-32-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; AVX-32-NEXT: vpmulld %ymm1, %ymm0, %ymm0
-; AVX-32-NEXT: retl
-;
-; AVX-64-LABEL: test_mul_v8i32_v8i16_minsize:
-; AVX-64: # %bb.0:
-; AVX-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
-; AVX-64-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
-; AVX-64-NEXT: vpmulld %ymm1, %ymm0, %ymm0
-; AVX-64-NEXT: retq
+; SLM-LABEL: test_mul_v8i32_v8i16_minsize:
+; SLM: # %bb.0:
+; SLM-NEXT: pxor %xmm1, %xmm1
+; SLM-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SLM-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; SLM-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
+; SLM-NEXT: pmulld %xmm1, %xmm2
+; SLM-NEXT: pmulld %xmm0, %xmm1
+; SLM-NEXT: movdqa %xmm2, %xmm0
+; SLM-NEXT: ret{{[l|q]}}
+;
+; SLOW-LABEL: test_mul_v8i32_v8i16_minsize:
+; SLOW: # %bb.0:
+; SLOW-NEXT: pxor %xmm1, %xmm1
+; SLOW-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SLOW-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; SLOW-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
+; SLOW-NEXT: pmulld %xmm1, %xmm2
+; SLOW-NEXT: pmulld %xmm0, %xmm1
+; SLOW-NEXT: movdqa %xmm2, %xmm0
+; SLOW-NEXT: ret{{[l|q]}}
+;
+; SSE4-LABEL: test_mul_v8i32_v8i16_minsize:
+; SSE4: # %bb.0:
+; SSE4-NEXT: pxor %xmm1, %xmm1
+; SSE4-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SSE4-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; SSE4-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778]
+; SSE4-NEXT: pmulld %xmm1, %xmm2
+; SSE4-NEXT: pmulld %xmm0, %xmm1
+; SSE4-NEXT: movdqa %xmm2, %xmm0
+; SSE4-NEXT: ret{{[l|q]}}
+;
+; AVX2-LABEL: test_mul_v8i32_v8i16_minsize:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778]
+; AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: ret{{[l|q]}}
%z = zext <8 x i16> %A to <8 x i32>
%m = mul nuw nsw <8 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778>
ret <8 x i32> %m
}
define <16 x i32> @test_mul_v16i32_v16i16_minsize(<16 x i16> %A) minsize {
-; SLM32-LABEL: test_mul_v16i32_v16i16_minsize:
-; SLM32: # %bb.0:
-; SLM32-NEXT: movdqa %xmm0, %xmm4
-; SLM32-NEXT: pxor %xmm3, %xmm3
-; SLM32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
-; SLM32-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SLM32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
-; SLM32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; SLM32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
-; SLM32-NEXT: pmulld %xmm3, %xmm4
-; SLM32-NEXT: pmulld %xmm3, %xmm0
-; SLM32-NEXT: pmulld %xmm3, %xmm2
-; SLM32-NEXT: pmulld %xmm1, %xmm3
-; SLM32-NEXT: movdqa %xmm4, %xmm1
-; SLM32-NEXT: retl
-;
-; SLM64-LABEL: test_mul_v16i32_v16i16_minsize:
-; SLM64: # %bb.0:
-; SLM64-NEXT: movdqa %xmm0, %xmm4
-; SLM64-NEXT: pxor %xmm3, %xmm3
-; SLM64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
-; SLM64-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SLM64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
-; SLM64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; SLM64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
-; SLM64-NEXT: pmulld %xmm3, %xmm4
-; SLM64-NEXT: pmulld %xmm3, %xmm0
-; SLM64-NEXT: pmulld %xmm3, %xmm2
-; SLM64-NEXT: pmulld %xmm1, %xmm3
-; SLM64-NEXT: movdqa %xmm4, %xmm1
-; SLM64-NEXT: retq
-;
-; SLOW32-LABEL: test_mul_v16i32_v16i16_minsize:
-; SLOW32: # %bb.0:
-; SLOW32-NEXT: movdqa %xmm0, %xmm4
-; SLOW32-NEXT: pxor %xmm3, %xmm3
-; SLOW32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
-; SLOW32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
-; SLOW32-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SLOW32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; SLOW32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
-; SLOW32-NEXT: pmulld %xmm3, %xmm0
-; SLOW32-NEXT: pmulld %xmm3, %xmm4
-; SLOW32-NEXT: pmulld %xmm3, %xmm2
-; SLOW32-NEXT: pmulld %xmm1, %xmm3
-; SLOW32-NEXT: movdqa %xmm4, %xmm1
-; SLOW32-NEXT: retl
-;
-; SLOW64-LABEL: test_mul_v16i32_v16i16_minsize:
-; SLOW64: # %bb.0:
-; SLOW64-NEXT: movdqa %xmm0, %xmm4
-; SLOW64-NEXT: pxor %xmm3, %xmm3
-; SLOW64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
-; SLOW64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
-; SLOW64-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SLOW64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; SLOW64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
-; SLOW64-NEXT: pmulld %xmm3, %xmm0
-; SLOW64-NEXT: pmulld %xmm3, %xmm4
-; SLOW64-NEXT: pmulld %xmm3, %xmm2
-; SLOW64-NEXT: pmulld %xmm1, %xmm3
-; SLOW64-NEXT: movdqa %xmm4, %xmm1
-; SLOW64-NEXT: retq
-;
-; SSE4-32-LABEL: test_mul_v16i32_v16i16_minsize:
-; SSE4-32: # %bb.0:
-; SSE4-32-NEXT: movdqa %xmm0, %xmm4
-; SSE4-32-NEXT: pxor %xmm3, %xmm3
-; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
-; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
-; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; SSE4-32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
-; SSE4-32-NEXT: pmulld %xmm3, %xmm0
-; SSE4-32-NEXT: pmulld %xmm3, %xmm4
-; SSE4-32-NEXT: pmulld %xmm3, %xmm2
-; SSE4-32-NEXT: pmulld %xmm1, %xmm3
-; SSE4-32-NEXT: movdqa %xmm4, %xmm1
-; SSE4-32-NEXT: retl
-;
-; SSE4-64-LABEL: test_mul_v16i32_v16i16_minsize:
-; SSE4-64: # %bb.0:
-; SSE4-64-NEXT: movdqa %xmm0, %xmm4
-; SSE4-64-NEXT: pxor %xmm3, %xmm3
-; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
-; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
-; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
-; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
-; SSE4-64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
-; SSE4-64-NEXT: pmulld %xmm3, %xmm0
-; SSE4-64-NEXT: pmulld %xmm3, %xmm4
-; SSE4-64-NEXT: pmulld %xmm3, %xmm2
-; SSE4-64-NEXT: pmulld %xmm1, %xmm3
-; SSE4-64-NEXT: movdqa %xmm4, %xmm1
-; SSE4-64-NEXT: retq
+; SLM-LABEL: test_mul_v16i32_v16i16_minsize:
+; SLM: # %bb.0:
+; SLM-NEXT: movdqa %xmm0, %xmm4
+; SLM-NEXT: pxor %xmm3, %xmm3
+; SLM-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; SLM-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SLM-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
+; SLM-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; SLM-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
+; SLM-NEXT: pmulld %xmm3, %xmm4
+; SLM-NEXT: pmulld %xmm3, %xmm0
+; SLM-NEXT: pmulld %xmm3, %xmm2
+; SLM-NEXT: pmulld %xmm1, %xmm3
+; SLM-NEXT: movdqa %xmm4, %xmm1
+; SLM-NEXT: ret{{[l|q]}}
+;
+; SLOW-LABEL: test_mul_v16i32_v16i16_minsize:
+; SLOW: # %bb.0:
+; SLOW-NEXT: movdqa %xmm0, %xmm4
+; SLOW-NEXT: pxor %xmm3, %xmm3
+; SLOW-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; SLOW-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
+; SLOW-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SLOW-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; SLOW-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
+; SLOW-NEXT: pmulld %xmm3, %xmm0
+; SLOW-NEXT: pmulld %xmm3, %xmm4
+; SLOW-NEXT: pmulld %xmm3, %xmm2
+; SLOW-NEXT: pmulld %xmm1, %xmm3
+; SLOW-NEXT: movdqa %xmm4, %xmm1
+; SLOW-NEXT: ret{{[l|q]}}
+;
+; SSE4-LABEL: test_mul_v16i32_v16i16_minsize:
+; SSE4: # %bb.0:
+; SSE4-NEXT: movdqa %xmm0, %xmm4
+; SSE4-NEXT: pxor %xmm3, %xmm3
+; SSE4-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; SSE4-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
+; SSE4-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; SSE4-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
+; SSE4-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778]
+; SSE4-NEXT: pmulld %xmm3, %xmm0
+; SSE4-NEXT: pmulld %xmm3, %xmm4
+; SSE4-NEXT: pmulld %xmm3, %xmm2
+; SSE4-NEXT: pmulld %xmm1, %xmm3
+; SSE4-NEXT: movdqa %xmm4, %xmm1
+; SSE4-NEXT: ret{{[l|q]}}
;
; AVX2-SLOW-LABEL: test_mul_v16i32_v16i16_minsize:
; AVX2-SLOW: # %bb.0:
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