[llvm] 95a52b3 - [AMDGPU][GFX9][DOC][NFC] Corrected description of registers available via getreg/setreg

[Dmitry Preobrazhensky via llvm-commits]

Author: Dmitry Preobrazhensky
Date: 2022-02-04T17:55:32+03:00
New Revision: 95a52b376ab292e834f2437ccd52fbeb728d5d02

URL: https://github.com/llvm/llvm-project/commit/95a52b376ab292e834f2437ccd52fbeb728d5d02
DIFF: https://github.com/llvm/llvm-project/commit/95a52b376ab292e834f2437ccd52fbeb728d5d02.diff

LOG: [AMDGPU][GFX9][DOC][NFC] Corrected description of registers available via getreg/setreg

This is to reflect changes introduced by https://reviews.llvm.org/D118860.

Added: 
    

Modified: 
    llvm/docs/AMDGPU/gfx9_hwreg.rst

Removed: 
    


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diff  --git a/llvm/docs/AMDGPU/gfx9_hwreg.rst b/llvm/docs/AMDGPU/gfx9_hwreg.rst
index 94add314cd075..c949da6e8f220 100644
--- a/llvm/docs/AMDGPU/gfx9_hwreg.rst
+++ b/llvm/docs/AMDGPU/gfx9_hwreg.rst
@@ -52,6 +52,10 @@ Defined register *names* include:
     HW_REG_LDS_ALLOC    Per-wave LDS allocation.
     HW_REG_IB_STS       Counters of outstanding instructions.
     HW_REG_SH_MEM_BASES Memory aperture.
+    HW_REG_TBA_LO       tba_lo register.
+    HW_REG_TBA_HI       tba_hi register.
+    HW_REG_TMA_LO       tma_lo register.
+    HW_REG_TMA_HI       tma_hi register.
     =================== ==========================================
 
 Examples: