[llvm] ca05edd - [AMDGPU] SILoadStoreOptimizer: simplify OptimizeListAgain test
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 4 05:09:24 PST 2022
Author: Jay Foad
Date: 2022-02-04T13:02:19Z
New Revision: ca05edd927dbec316433556e3b13a88cad5a0618
URL: https://github.com/llvm/llvm-project/commit/ca05edd927dbec316433556e3b13a88cad5a0618
DIFF: https://github.com/llvm/llvm-project/commit/ca05edd927dbec316433556e3b13a88cad5a0618.diff
LOG: [AMDGPU] SILoadStoreOptimizer: simplify OptimizeListAgain test
At this point CI represents the combined access (original CI combined
with Paired) so it doesn't make any sense to add in Paired.width again.
NFCI.
Added:
Modified:
llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
index 44bdbe37dec04..37b74d39eb9c2 100644
--- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
@@ -2128,42 +2128,42 @@ SILoadStoreOptimizer::optimizeInstsWithSameBaseAddr(
MachineBasicBlock::iterator NewMI =
mergeSBufferLoadImmPair(CI, Paired, InstsToMove);
CI.setMI(NewMI, *this);
- OptimizeListAgain |= (CI.Width + Paired.Width) < 8;
+ OptimizeListAgain |= CI.Width < 8;
break;
}
case BUFFER_LOAD: {
MachineBasicBlock::iterator NewMI =
mergeBufferLoadPair(CI, Paired, InstsToMove);
CI.setMI(NewMI, *this);
- OptimizeListAgain |= (CI.Width + Paired.Width) < 4;
+ OptimizeListAgain |= CI.Width < 4;
break;
}
case BUFFER_STORE: {
MachineBasicBlock::iterator NewMI =
mergeBufferStorePair(CI, Paired, InstsToMove);
CI.setMI(NewMI, *this);
- OptimizeListAgain |= (CI.Width + Paired.Width) < 4;
+ OptimizeListAgain |= CI.Width < 4;
break;
}
case MIMG: {
MachineBasicBlock::iterator NewMI =
mergeImagePair(CI, Paired, InstsToMove);
CI.setMI(NewMI, *this);
- OptimizeListAgain |= (CI.Width + Paired.Width) < 4;
+ OptimizeListAgain |= CI.Width < 4;
break;
}
case TBUFFER_LOAD: {
MachineBasicBlock::iterator NewMI =
mergeTBufferLoadPair(CI, Paired, InstsToMove);
CI.setMI(NewMI, *this);
- OptimizeListAgain |= (CI.Width + Paired.Width) < 4;
+ OptimizeListAgain |= CI.Width < 4;
break;
}
case TBUFFER_STORE: {
MachineBasicBlock::iterator NewMI =
mergeTBufferStorePair(CI, Paired, InstsToMove);
CI.setMI(NewMI, *this);
- OptimizeListAgain |= (CI.Width + Paired.Width) < 4;
+ OptimizeListAgain |= CI.Width < 4;
break;
}
}
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