[PATCH] D118802: [AArch64][CodeGen] Always use SVE (when enabled) to lower 64-bit vector multiplies
David Sherwood via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 4 00:58:32 PST 2022
david-arm updated this revision to Diff 405885.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D118802/new/
https://reviews.llvm.org/D118802
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sve-fixed-length-int-arith.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-int-rem.ll
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