[PATCH] D118951: [Spill2Reg] Using AVX opcodes when available.

[Vasileios Porpodas via Phabricator via llvm-commits]

vporpo created this revision.
Herald added subscribers: pengfei, hiraditya, qcolombet.
vporpo requested review of this revision.
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Herald added a subscriber: llvm-commits.

This patch updates the vector spill/reload instructions to use the AVX
opcodes by default if the targets supports it. This can be turned off
with the -spill2reg-no-avx flag.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D118951

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/CodeGen/Spill2Reg.cpp
  llvm/lib/Target/X86/X86InstrInfo.cpp
  llvm/lib/Target/X86/X86InstrInfo.h
  llvm/test/CodeGen/X86/spill2reg_end_to_end_16bit.ll
  llvm/test/CodeGen/X86/spill2reg_end_to_end_32bit.ll
  llvm/test/CodeGen/X86/spill2reg_end_to_end_64bit.ll
  llvm/test/CodeGen/X86/spill2reg_end_to_end_8bit.ll
  llvm/test/CodeGen/X86/spill2reg_simple_1_16bit.mir
  llvm/test/CodeGen/X86/spill2reg_simple_1_32bit.mir
  llvm/test/CodeGen/X86/spill2reg_simple_1_64bit.mir
  llvm/test/CodeGen/X86/spill2reg_simple_1_8bit.mir

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