[PATCH] D118810: [RISCV] Select unmasked RVV pseudos in a DAG post-process

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2196
+
+  if (RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags)) {
+    // The last operand of the pseudo is the policy op, but we're expecting a
----------------
frasercrmck wrote:
> craig.topper wrote:
> > If the policy Op exists and isn't TAIL_AGNOSTIC, this transform isn't valid is it?
> > 
> > Using an all ones mask with TAIL_UNDISTURBED is a valid way to get tail undisturbed behavior until we have tail undisturbed unmasked instructions.
> Yes you're right, thanks, I wasn't careful enough about that. Though I suppose TAIL_UNDISTURBED with an IMPLICIT_DEF merge operand would still be valid to transform? Regardless, we don't have test coverage for that so I've not added logic to deal with that.
I think the IMPLICIT_DEF case would be ok. Though maybe DAG combines to simplify such cases might be better.


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  https://reviews.llvm.org/D118810/new/

https://reviews.llvm.org/D118810