[PATCH] D115401: AMDGPU: Fix clobbering SCC when expanding large offset spill pseudos

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1400
+
+      assert(TmpOffsetVGPR);
+    } else if (!SOffset && CanClobberSCC) {
----------------
This probably needs to be a proper diagnostics instead of assert.


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Comment at: llvm/test/CodeGen/AMDGPU/swdev309419-agpr.mir:1
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=GFX908 %s
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Can you rename file to something meaningful? Like accvgpr-spill-scc-clober.mir.


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Comment at: llvm/test/CodeGen/AMDGPU/swdev309419-agpr.mir:3
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=GFX908 %s
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=GFX90A %s
+---
----------------
Probably add run line with flat scratch and another with -mattr=+architected-flat-scratch.


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Comment at: llvm/test/CodeGen/AMDGPU/swdev309419-sgpr-to-vmem.mir:1
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -amdgpu-spill-sgpr-to-vgpr=0 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=VMEM-GFX8 %s
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Same here, I am not sure we need swdev here.


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Comment at: llvm/test/CodeGen/AMDGPU/swdev309419-unhandled.mir:1
+# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -amdgpu-spill-sgpr-to-vgpr=0 -verify-machineinstrs -run-pass=prologepilog %s -o /dev/null 2>&1 | FileCheck %s
+
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Same here and below.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115401/new/

https://reviews.llvm.org/D115401