[llvm] 54d2e6a - [hwasan] add musttail IR test.
Florian Mayer via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 3 09:30:50 PST 2022
Author: Florian Mayer
Date: 2022-02-03T09:30:34-08:00
New Revision: 54d2e6a1214f1cee6ab0b4e7c73c75bd35aeb9dc
URL: https://github.com/llvm/llvm-project/commit/54d2e6a1214f1cee6ab0b4e7c73c75bd35aeb9dc
DIFF: https://github.com/llvm/llvm-project/commit/54d2e6a1214f1cee6ab0b4e7c73c75bd35aeb9dc.diff
LOG: [hwasan] add musttail IR test.
we currently only have a test at the clang level
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D118856
Added:
llvm/test/Instrumentation/HWAddressSanitizer/musttail.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/musttail.ll b/llvm/test/Instrumentation/HWAddressSanitizer/musttail.ll
new file mode 100644
index 0000000000000..f36e2c16df029
--- /dev/null
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/musttail.ll
@@ -0,0 +1,30 @@
+; Regression test for a compiler bug that caused a crash when instrumenting code
+; using musttail.
+
+; RUN: opt -S -passes=hwasan -hwasan-use-stack-safety=0 %s -o - | FileCheck %s
+
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-arm-unknown-eabi"
+
+define dso_local noundef i32 @_Z3bari(i32 noundef %0) sanitize_hwaddress {
+ %2 = alloca i32, align 4
+ store i32 %0, i32* %2, align 4
+ %3 = load i32, i32* %2, align 4
+ ret i32 %3
+}
+
+define dso_local noundef i32 @_Z3fooi(i32 noundef %0) sanitize_hwaddress {
+ %2 = alloca i32, align 4
+ %3 = alloca i32, align 4
+ store i32 %0, i32* %2, align 4
+ store volatile i32 5, i32* %3, align 4
+ %4 = load i32, i32* %2, align 4
+ %5 = load volatile i32, i32* %3, align 4
+ %6 = add nsw i32 %4, %5
+ ; Check we untag before the musttail.
+ ; CHECK: call void @llvm.memset.p0i8.i64
+ ; CHECK: musttail call
+ ; CHECK-NOT: call void @llvm.memset.p0i8.i64
+ %7 = musttail call noundef i32 @_Z3bari(i32 noundef %6)
+ ret i32 %7
+}
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