[PATCH] D118461: [AMDGPU] Introduce new ISel combine for trunc-slr patterns

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 3 06:48:22 PST 2022


foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.

LGTM, thanks! Just very minor comments inline.



================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2273
+def IMMBitSelConst : SDNodeXForm<imm, [{
+  return CurDAG->getTargetConstant((1 << N->getZExtValue()), SDLoc(N),
+                                   MVT::i32);
----------------
Don't need parens around the `<<` expression.


================
Comment at: llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll:1
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 ; RUN: llc -march=amdgcn -mtriple=amdgcn-- -stop-after=amdgpu-isel -verify-machineinstrs -O0 < %s | FileCheck -check-prefix=GCN %s
----------------
"dagcombine" is not a very good name for the file, because this is isel not a combine, but I guess it's OK if you've already committed the file.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118461/new/

https://reviews.llvm.org/D118461



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