[PATCH] D117789: [RISCV] Add support for Zihintpause extention

[Shao-Ce SUN via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG005fd8aa702e: [RISCV] Add support for Zihintpause extention (authored by achieveartificialintelligence).

Changed prior to commit:
  https://reviews.llvm.org/D117789?vs=401642&id=405586#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117789/new/

https://reviews.llvm.org/D117789

Files:
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/attributes.ll
  llvm/test/MC/Disassembler/RISCV/unknown-fence-field.txt
  llvm/test/MC/RISCV/rv32i-invalid.s
  llvm/test/MC/RISCV/rv32zihintpause-valid.s
  llvm/test/MC/RISCV/rvzihintpause-aliases-valid.s

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