[PATCH] D118595: [AARCH64][DAGCombine] Add combine for negation of CSEL absolute value pattern.

[Sunho Kim via Phabricator via llvm-commits]

sunho added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:14730
+  // introduces two additional negations while reducing one negation.
+  if (!isNegatedInteger(N0) && !isNegatedInteger(N1))
+    return SDValue();
----------------
I've added isNegatedInteger util function as suggested by david-arm in the original patch. The util function can be used in many places across multiple backends. I can submit a follow-up patch replacing to use this function if desired.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118595/new/

https://reviews.llvm.org/D118595