[PATCH] D118845: [RISCV] Move the creation of VLMaxSentinel to isel. Use X0 during lowering.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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The VLMaxSentinel is represented as TargetConstant, but that's included
in isa<ConstantSDNode>. To keep constant VLs and VLMax separate as long
as possible use the X0 register during lowering and only convert to
VLMaxSentinel during isel.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D118845

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

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