[PATCH] D118808: Loop Strength Reduce - Optimize unused IVs to final values in the exit block with SCEV

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

This is normally a IndVar's problem, but i guess LSR runs so late that there is no IndVar's scheduled after it?
Do you have a phase-ordering test showing this missing simplification?


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https://reviews.llvm.org/D118808