[PATCH] D118394: [AArch64][NEON][SVE] Lower FCOPYSIGN using AArch64ISD::BSP

[David Truby via Phabricator via llvm-commits]

DavidTruby updated this revision to Diff 405302.
DavidTruby added a comment.

Add back special f64 handling for NEON to avoid going through integer register


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118394/new/

https://reviews.llvm.org/D118394

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/arm64-fcopysign.ll
  llvm/test/CodeGen/AArch64/f16-instructions.ll
  llvm/test/CodeGen/AArch64/fcopysign.ll
  llvm/test/CodeGen/AArch64/sve-fcopysign.ll
  llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
  llvm/test/CodeGen/AArch64/vector-fcopysign.ll

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