[PATCH] D118805: [GlobalISel] Don't combine instructions which are fed by memory instructions using different size

[Róbert Ágoston via Phabricator via llvm-commits]

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Memory instructions like extending loads from the same address are not equal if
their size is not equal.

This fixes https://github.com/llvm/llvm-project/issues/53524.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D118805

Files:
  llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-not-really-equiv-insts.mir

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