[PATCH] D117871: [AArch64][CodeGen] Always use SVE (when enabled) to lower integer divides

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen accepted this revision.
sdesmalen added a comment.

In D117871#3289061 <https://reviews.llvm.org/D117871#3289061>, @paulwalker-arm wrote:

> The code looks fine to me.  For the tests I would prefer it if you removed the new VBITS_EQ_128 lines for the >128bit vector tests as I don't believe they're testing anything new that isn't already being tested by the 64 and 128 bit vector tests.  More than that, because you're hardwiring all the output I can see it just being a source of pain as the tests are more likely to need to be manually updated after unrelated code generation changes, which is something that has previously annoyed people.  If you think the checks offer real value then as a minimum please consider at least removing them from the v32i8 variants as they're likely to be the worst offenders.

+1


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117871/new/

https://reviews.llvm.org/D117871