[llvm] c935f6e - [Hexagon] Punt on registers without reaching defs in addr mode opt

[Krzysztof Parzyszek via llvm-commits]

Author: Krzysztof Parzyszek
Date: 2022-02-01T09:52:59-08:00
New Revision: c935f6e0486c9a85b451791f95f9342ce7c9fd28

URL: https://github.com/llvm/llvm-project/commit/c935f6e0486c9a85b451791f95f9342ce7c9fd28
DIFF: https://github.com/llvm/llvm-project/commit/c935f6e0486c9a85b451791f95f9342ce7c9fd28.diff

LOG: [Hexagon] Punt on registers without reaching defs in addr mode opt

This fixes https://github.com/llvm/llvm-project/issues/52636.

Added: 
    llvm/test/CodeGen/Hexagon/addrmode-no-rdef.mir

Modified: 
    llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
index ea6a7498e27f1..311e43d772101 100644
--- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
@@ -313,12 +313,18 @@ bool HexagonOptAddrMode::isSafeToExtLR(NodeAddr<StmtNode *> SN,
       return false;
     }
 
+    // If the register is undefined (for example if it's a reserved register),
+    // it may still be possible to extend the range, but it's safer to be
+    // conservative and just punt.
+    if (LRExtRegRD == 0)
+      return false;
+
     MachineInstr *UseMI = NodeAddr<StmtNode *>(IA).Addr->getCode();
     NodeAddr<DefNode *> LRExtRegDN = DFG->addr<DefNode *>(LRExtRegRD);
     // Reaching Def to LRExtReg can't be a phi.
     if ((LRExtRegDN.Addr->getFlags() & NodeAttrs::PhiRef) &&
         MI->getParent() != UseMI->getParent())
-    return false;
+      return false;
   }
   return true;
 }

diff  --git a/llvm/test/CodeGen/Hexagon/addrmode-no-rdef.mir b/llvm/test/CodeGen/Hexagon/addrmode-no-rdef.mir
new file mode 100644
index 0000000000000..8e43189f82feb
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/addrmode-no-rdef.mir
@@ -0,0 +1,41 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Check that this doesn't crash.
+; CHECK: call f1
+
+target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
+target triple = "hexagon"
+
+%s.0 = type { %s.1 }
+%s.1 = type { %s.2 }
+%s.2 = type { i32, i32 }
+
+define dso_local i32 @f0(i1 zeroext %a0) local_unnamed_addr #0 {
+b0:
+  %v0 = tail call i32 @llvm.read_register.i32(metadata !0)
+  %v1 = add nsw i32 %v0, 4096
+  %v2 = inttoptr i32 %v1 to %s.0*
+  %v3 = getelementptr inbounds %s.0, %s.0* %v2, i32 -1
+  %v4 = tail call i32 bitcast (i32 (...)* @f1 to i32 (%s.0*)*)(%s.0* noundef nonnull %v3) #2
+  br i1 %a0, label %b2, label %b1
+
+b1:                                               ; preds = %b0
+  %v5 = getelementptr inbounds %s.0, %s.0* %v3, i32 0, i32 0, i32 0, i32 0
+  %v6 = load i32, i32* %v5, align 4
+  br label %b2
+
+b2:                                               ; preds = %b1, %b0
+  %v7 = phi i32 [ %v6, %b1 ], [ undef, %b0 ]
+  ret i32 %v7
+}
+
+; Function Attrs: nounwind readonly
+declare i32 @llvm.read_register.i32(metadata) #1
+
+declare dso_local i32 @f1(...) local_unnamed_addr #0
+
+attributes #0 = { "target-features"="+reserved-r19,+v60,-long-calls" }
+attributes #1 = { nounwind readonly }
+attributes #2 = { nounwind }
+
+!0 = !{!"r19"}