[PATCH] D116804: [x86] use SETCC_CARRY instead of SBB node for select lowering

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 1 07:52:51 PST 2022


spatel added a comment.

In D116804#3286618 <https://reviews.llvm.org/D116804#3286618>, @apostolakis wrote:

> We noticed a 15% performance regression for llvm_test_suite/MultiSource/Benchmarks/MallocBench/gs with this patch.
> Looking at the assembly, noticed a relatively long dependence chain including the following sequence:
>
>   mov   (%rbx),%rax 
>   sbb   %rax,%rax
>   or    %rdx,%rax 

Do you have the IR for the function where that appears?
I haven't looked at the mechanics of `BreakFalseDeps` and X86InstrInfo::getUndefRegClearance() in a long time, and I'm not sure if they would handle a pattern like that (the load of %rax may already be providing the expected clearance?).
If we're going to need a tuning flag similar to `TuningPOPCNTFalseDep`, then we could just use that as a predicate hack for the code that was changed in this patch (so don't take chances and always create a real SBB with zero operand if the flag is set).


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