[PATCH] D117871: [AArch64][CodeGen] Always use SVE (when enabled) to lower integer divides
David Sherwood via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 1 07:52:45 PST 2022
david-arm added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-int-rem.ll:781
+
+; VBITS_EQ_128-LABEL: srem_v1i64:
+; VBITS_EQ_128: ptrue p0.d, vl1
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NOTE: The codegen here would be improved if we also used SVE for 64-bit element vector multiplies!
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117871/new/
https://reviews.llvm.org/D117871
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