[PATCH] D118394: [AArch64][NEON][SVE] Lower FCOPYSIGN using AArch64ISD::BSP

[David Truby via Phabricator via llvm-commits]

DavidTruby added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/arm64-fcopysign.ll:27
 ; CHECK-NEXT:    fneg.2d v2, v2
-; CHECK-NEXT:    bit.16b v0, v1, v2
+; CHECK-NEXT:    bif.16b v0, v1, v2
 ; CHECK-NEXT:    ; kill: def $d0 killed $d0 killed $q0
----------------
peterwaller-arm wrote:
> Heads up, this looks like an unintended semantic change.
This is caused by the odd code mentioned above that handles specially for f64, which I forgot to change when changing the mask generation. However since that change I don't think the special handling is actually necessary anymore. I'm just verifying that and will have a fix up soon.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118394/new/

https://reviews.llvm.org/D118394