[llvm] 06105f2 - Pre-commit test cases missing SSHLSAT/USHLSAT folds. NFC
Bjorn Pettersson via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 1 01:52:09 PST 2022
Author: Bjorn Pettersson
Date: 2022-02-01T10:51:35+01:00
New Revision: 06105f2ef1a9278d16e916d5f011731ad73f6abd
URL: https://github.com/llvm/llvm-project/commit/06105f2ef1a9278d16e916d5f011731ad73f6abd
DIFF: https://github.com/llvm/llvm-project/commit/06105f2ef1a9278d16e916d5f011731ad73f6abd.diff
LOG: Pre-commit test cases missing SSHLSAT/USHLSAT folds. NFC
Added:
llvm/test/CodeGen/AArch64/sshl_sat.ll
llvm/test/CodeGen/AArch64/ushl_sat.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/sshl_sat.ll b/llvm/test/CodeGen/AArch64/sshl_sat.ll
new file mode 100644
index 000000000000..208c339dea0d
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/sshl_sat.ll
@@ -0,0 +1,210 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
+
+declare i16 @llvm.sshl.sat.i16(i16, i16)
+declare <4 x i16> @llvm.sshl.sat.v4i16(<4 x i16>, <4 x i16>)
+
+; fold (shlsat undef, x) -> 0
+define i16 @combine_shl_undef(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: mov w9, #-2147483648
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: cinv w9, w9, ge
+; CHECK-NEXT: csel w8, w9, w8, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 undef, i16 %y)
+ ret i16 %tmp
+}
+
+; fold (shlsat x, undef) -> undef
+define i16 @combine_shl_by_undef(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_by_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w9, w0, #16
+; CHECK-NEXT: mov w8, #-2147483648
+; CHECK-NEXT: cmp w9, #0
+; CHECK-NEXT: cinv w8, w8, ge
+; CHECK-NEXT: cmp w9, w9
+; CHECK-NEXT: csel w8, w8, w9, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 %x, i16 undef)
+ ret i16 %tmp
+}
+
+; fold (shlsat poison, x) -> 0
+define i16 @combine_shl_poison(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_poison:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: mov w9, #-2147483648
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: cinv w9, w9, ge
+; CHECK-NEXT: csel w8, w9, w8, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 poison, i16 %y)
+ ret i16 %tmp
+}
+
+; fold (shlsat x, poison) -> undef
+define i16 @combine_shl_by_poison(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_by_poison:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w9, w0, #16
+; CHECK-NEXT: mov w8, #-2147483648
+; CHECK-NEXT: cmp w9, #0
+; CHECK-NEXT: cinv w8, w8, ge
+; CHECK-NEXT: cmp w9, w9
+; CHECK-NEXT: csel w8, w8, w9, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 %x, i16 poison)
+ ret i16 %tmp
+}
+
+; fold (shlsat x, bitwidth) -> undef
+define i16 @combine_shl_by_bitwidth(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_by_bitwidth:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w9, w0, #16
+; CHECK-NEXT: mov w8, #-2147483648
+; CHECK-NEXT: cmp w9, #0
+; CHECK-NEXT: cinv w8, w8, ge
+; CHECK-NEXT: csel w8, w8, wzr, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 %x, i16 16)
+ ret i16 %tmp
+}
+
+; fold (shlsat 0, x) -> 0
+define i16 @combine_shl_zero(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: mov w9, #-2147483648
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: cinv w9, w9, ge
+; CHECK-NEXT: csel w8, w9, w8, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 0, i16 %y)
+ ret i16 %tmp
+}
+
+; fold (shlsat x, 0) -> x
+define i16 @combine_shlsat_by_zero(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shlsat_by_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w9, w0, #16
+; CHECK-NEXT: mov w8, #-2147483648
+; CHECK-NEXT: cmp w9, #0
+; CHECK-NEXT: cinv w8, w8, ge
+; CHECK-NEXT: cmp w9, w9
+; CHECK-NEXT: csel w8, w8, w9, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 %x, i16 0)
+ ret i16 %tmp
+}
+
+; fold (shlsat c1, c2) -> c3
+define i16 @combine_shlsat_constfold(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shlsat_constfold:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #524288
+; CHECK-NEXT: mov w9, #-2147483648
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: cinv w9, w9, ge
+; CHECK-NEXT: cmp w8, #128, lsl #12 // =524288
+; CHECK-NEXT: mov w8, #2097152
+; CHECK-NEXT: csel w8, w9, w8, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 8, i16 2)
+ ret i16 %tmp
+}
+
+; fold (shlsat c1, c2) -> sat max
+define i16 @combine_shlsat_satmax(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shlsat_satmax:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #524288
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: mov w8, #-2147483648
+; CHECK-NEXT: cinv w8, w8, ge
+; CHECK-NEXT: csel w8, w8, wzr, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 8, i16 15)
+ ret i16 %tmp
+}
+
+; fold (shlsat c1, c2) -> sat min
+define i16 @combine_shlsat_satmin(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shlsat_satmin:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #-524288
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: mov w8, #-2147483648
+; CHECK-NEXT: cinv w8, w8, ge
+; CHECK-NEXT: csel w8, w8, wzr, ne
+; CHECK-NEXT: asr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.sshl.sat.i16(i16 -8, i16 15)
+ ret i16 %tmp
+}
+
+declare void @sink4xi16(i16, i16, i16, i16)
+
+; fold (shlsat c1, c2) -> c3 , c1/c2/c3 being vectors
+define void @combine_shlsat_vector() nounwind {
+; CHECK-LABEL: combine_shlsat_vector:
+; CHECK: // %bb.0:
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w8, #524288
+; CHECK-NEXT: mov w9, #-2147483648
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: cinv w10, w9, ge
+; CHECK-NEXT: csel w11, w10, wzr, ne
+; CHECK-NEXT: cmp w8, #128, lsl #12 // =524288
+; CHECK-NEXT: mov w8, #2097152
+; CHECK-NEXT: asr w11, w11, #16
+; CHECK-NEXT: csel w8, w10, w8, ne
+; CHECK-NEXT: mov w10, #-524288
+; CHECK-NEXT: asr w8, w8, #16
+; CHECK-NEXT: cmp w10, #0
+; CHECK-NEXT: cinv w9, w9, ge
+; CHECK-NEXT: fmov s0, w8
+; CHECK-NEXT: csel w8, w9, wzr, ne
+; CHECK-NEXT: cmn w10, #128, lsl #12 // =524288
+; CHECK-NEXT: mov w10, #-2097152
+; CHECK-NEXT: csel w9, w9, w10, ne
+; CHECK-NEXT: asr w8, w8, #16
+; CHECK-NEXT: mov v0.h[1], w11
+; CHECK-NEXT: asr w9, w9, #16
+; CHECK-NEXT: mov v0.h[2], w9
+; CHECK-NEXT: mov v0.h[3], w8
+; CHECK-NEXT: umov w0, v0.h[0]
+; CHECK-NEXT: umov w1, v0.h[1]
+; CHECK-NEXT: umov w2, v0.h[2]
+; CHECK-NEXT: umov w3, v0.h[3]
+; CHECK-NEXT: bl sink4xi16
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: ret
+ %tmp = call <4 x i16> @llvm.sshl.sat.v4i16(
+ <4 x i16><i16 8, i16 8, i16 -8, i16 -8>,
+ <4 x i16><i16 2, i16 15, i16 2, i16 15>)
+ ; Pass elements as arguments in a call to get CHECK statements that verify
+ ; the constant folding.
+ %e0 = extractelement <4 x i16> %tmp, i16 0
+ %e1 = extractelement <4 x i16> %tmp, i16 1
+ %e2 = extractelement <4 x i16> %tmp, i16 2
+ %e3 = extractelement <4 x i16> %tmp, i16 3
+ call void @sink4xi16(i16 %e0, i16 %e1, i16 %e2, i16 %e3)
+ ret void
+}
diff --git a/llvm/test/CodeGen/AArch64/ushl_sat.ll b/llvm/test/CodeGen/AArch64/ushl_sat.ll
new file mode 100644
index 000000000000..0a1373bf487f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/ushl_sat.ll
@@ -0,0 +1,155 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
+
+declare i16 @llvm.ushl.sat.i16(i16, i16)
+declare <2 x i16> @llvm.ushl.sat.v2i16(<2 x i16>, <2 x i16>)
+
+; fold (shlsat undef, x) -> 0
+define i16 @combine_shl_undef(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: csetm w8, ne
+; CHECK-NEXT: lsr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 undef, i16 %y)
+ ret i16 %tmp
+}
+
+; fold (shlsat x, undef) -> undef
+define i16 @combine_shl_by_undef(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_by_undef:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w8, w0, #16
+; CHECK-NEXT: cmp w8, w8
+; CHECK-NEXT: csinv w8, w8, wzr, eq
+; CHECK-NEXT: lsr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 %x, i16 undef)
+ ret i16 %tmp
+}
+
+; fold (shlsat poison, x) -> 0
+define i16 @combine_shl_poison(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_poison:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: csetm w8, ne
+; CHECK-NEXT: lsr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 poison, i16 %y)
+ ret i16 %tmp
+}
+
+; fold (shlsat x, poison) -> undef
+define i16 @combine_shl_by_poison(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_by_poison:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w8, w0, #16
+; CHECK-NEXT: cmp w8, w8
+; CHECK-NEXT: csinv w8, w8, wzr, eq
+; CHECK-NEXT: lsr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 %x, i16 poison)
+ ret i16 %tmp
+}
+
+; fold (shlsat x, bitwidth) -> undef
+define i16 @combine_shl_by_bitwidth(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_by_bitwidth:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w8, w0, #16
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: csetm w8, ne
+; CHECK-NEXT: lsr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 %x, i16 16)
+ ret i16 %tmp
+}
+
+; fold (ushlsat 0, x) -> 0
+define i16 @combine_shl_zero(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shl_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, wzr
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: csetm w8, ne
+; CHECK-NEXT: lsr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 0, i16 %y)
+ ret i16 %tmp
+}
+
+; fold (ushlsat x, 0) -> x
+define i16 @combine_shlsat_by_zero(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shlsat_by_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: lsl w8, w0, #16
+; CHECK-NEXT: cmp w8, w8
+; CHECK-NEXT: csinv w8, w8, wzr, eq
+; CHECK-NEXT: lsr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 %x, i16 0)
+ ret i16 %tmp
+}
+
+; fold (ushlsat c1, c2) -> c3
+define i16 @combine_shlsat_constfold(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shlsat_constfold:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #524288
+; CHECK-NEXT: cmp w8, #128, lsl #12 // =524288
+; CHECK-NEXT: mov w8, #2097152
+; CHECK-NEXT: csinv w8, w8, wzr, eq
+; CHECK-NEXT: lsr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 8, i16 2)
+ ret i16 %tmp
+}
+
+; fold (ushlsat c1, c2) -> sat max
+define i16 @combine_shlsat_satmax(i16 %x, i16 %y) nounwind {
+; CHECK-LABEL: combine_shlsat_satmax:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #524288
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: csetm w8, ne
+; CHECK-NEXT: lsr w0, w8, #16
+; CHECK-NEXT: ret
+ %tmp = call i16 @llvm.ushl.sat.i16(i16 8, i16 15)
+ ret i16 %tmp
+}
+
+
+declare void @sink2xi16(i16, i16)
+
+; fold (ushlsat c1, c2) -> c3 , c1/c2/c3 being vectors
+define void @combine_shlsat_vector() nounwind {
+; CHECK-LABEL: combine_shlsat_vector:
+; CHECK: // %bb.0:
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w8, #524288
+; CHECK-NEXT: mov w9, #2097152
+; CHECK-NEXT: cmp w8, #128, lsl #12 // =524288
+; CHECK-NEXT: csinv w9, w9, wzr, eq
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: csetm w8, ne
+; CHECK-NEXT: fmov s0, w9
+; CHECK-NEXT: mov v0.s[1], w8
+; CHECK-NEXT: ushr v0.2s, v0.2s, #16
+; CHECK-NEXT: mov w1, v0.s[1]
+; CHECK-NEXT: fmov w0, s0
+; CHECK-NEXT: bl sink2xi16
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: ret
+ %tmp = call <2 x i16> @llvm.ushl.sat.v2i16(<2 x i16><i16 8, i16 8>,
+ <2 x i16><i16 2, i16 15>)
+ ; Pass elements as arguments in a call to get CHECK statements that verify
+ ; the constant folding.
+ %e0 = extractelement <2 x i16> %tmp, i16 0
+ %e1 = extractelement <2 x i16> %tmp, i16 1
+ call void @sink2xi16(i16 %e0, i16 %e1)
+ ret void
+}
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