[PATCH] D115352: [AArch64] Add mayRaiseFPException to appropriate instructions

[John Brawn via Phabricator via llvm-commits]

john.brawn requested review of this revision.
john.brawn added a comment.

I've created D118621 <https://reviews.llvm.org/D118621> for making the AArch64 machine combiner patterns preserve MIFlags.



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Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:5023
 
+multiclass SingleOperandFPDataNoException<bits<4> opcode, string asm,
+                                       SDPatternOperator node = null_frag>
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dmgreen wrote:
> Do we need to add this, or is it simpler to pass fpexceptions=0 from where it is used?
Doing it this way makes things simpler for the next step, which is marking instructions as reading FPCR, as there's no direct way to express "this multiclass instantiation doesn't use a register that the multiclass does" and the best solution I've come up with is having it be decided in the multiclass by a multiclass parameter.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115352/new/

https://reviews.llvm.org/D115352