[PATCH] D118623: [StructurizeCFG] Clean up some boolean not instructions

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
foad added reviewers: ekatz, sameerds, tsymalla, nhaehnle, arsenm, rampitec.
Herald added subscribers: kerbowa, hiraditya, jvesely.
foad requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

In some cases StructurizeCFG inserts i1 xor instructions to invert
predicates. Add a quick loop to clean these up afterwards if we can get
away with modifying an existing compare instruction instead.
(StructurizeCFG is generally run late in the pipeline so instcombine
does not clean them up for us.)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D118623

Files:
  llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
  llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
  llvm/test/CodeGen/AMDGPU/ctpop16.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
  llvm/test/CodeGen/AMDGPU/loop_break.ll
  llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
  llvm/test/CodeGen/AMDGPU/multilevel-break.ll
  llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
  llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
  llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
  llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
  llvm/test/Transforms/StructurizeCFG/AMDGPU/loop-subregion-misordered.ll
  llvm/test/Transforms/StructurizeCFG/bug36015.ll
  llvm/test/Transforms/StructurizeCFG/invert-constantexpr.ll
  llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll
  llvm/test/Transforms/StructurizeCFG/post-order-traversal-bug.ll

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