[PATCH] D118621: [AArch64] Make machine combiner patterns preserve MIFlags
John Brawn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 31 08:50:39 PST 2022
john.brawn created this revision.
john.brawn added reviewers: fhahn, dmgreen, kpn, t.p.northover.
Herald added subscribers: hiraditya, kristof.beyls.
john.brawn requested review of this revision.
Herald added a project: LLVM.
This is mainly done so that we don't lose the nofpexcept flag once we start emitting it.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D118621
Files:
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/test/CodeGen/AArch64/machine-combiner-instr-fmf.mir
Index: llvm/test/CodeGen/AArch64/machine-combiner-instr-fmf.mir
===================================================================
--- llvm/test/CodeGen/AArch64/machine-combiner-instr-fmf.mir
+++ llvm/test/CodeGen/AArch64/machine-combiner-instr-fmf.mir
@@ -6,7 +6,7 @@
# CHECK: [[C:%.*]]:fpr32 = COPY $s2
# CHECK-NEXT: [[B:%.*]]:fpr32 = COPY $s1
# CHECK-NEXT: [[A:%.*]]:fpr32 = COPY $s0
-# CHECK-NEXT: :fpr32 = FMADDSrrr [[B]], [[A]], [[C]]
+# CHECK-NEXT: :fpr32 = nnan ninf nsz arcp contract afn reassoc FMADDSrrr [[B]], [[A]], [[C]]
---
name: scalar_fmadd_fast
alignment: 4
@@ -45,7 +45,7 @@
# CHECK: [[C:%.*]]:fpr32 = COPY $s2
# CHECK-NEXT: [[B:%.*]]:fpr32 = COPY $s1
# CHECK-NEXT: [[A:%.*]]:fpr32 = COPY $s0
-# CHECK-NEXT: :fpr32 = FMADDSrrr [[B]], [[A]], [[C]]
+# CHECK-NEXT: :fpr32 = contract FMADDSrrr [[B]], [[A]], [[C]]
---
name: scalar_fmadd_contract
@@ -125,7 +125,7 @@
# CHECK: [[C:%.*]]:fpr32 = COPY $s2
# CHECK-NEXT: [[B:%.*]]:fpr32 = COPY $s1
# CHECK-NEXT: [[A:%.*]]:fpr32 = COPY $s0
-# CHECK-NEXT: :fpr32 = FMADDSrrr [[B]], [[A]], [[C]]
+# CHECK-NEXT: :fpr32 = contract FMADDSrrr [[B]], [[A]], [[C]]
---
name: scalar_fmadd_contract_op1
@@ -206,7 +206,7 @@
# CHECK: [[C:%.*]]:fpr128 = COPY $q2
# CHECK-NEXT: [[B:%.*]]:fpr128 = COPY $q1
# CHECK-NEXT: [[A:%.*]]:fpr128 = COPY $q0
-# CHECK-NEXT: fpr128 = FMLAv2f64 [[C]], [[B]], [[A]]
+# CHECK-NEXT: fpr128 = nnan ninf nsz arcp contract afn reassoc FMLAv2f64 [[C]], [[B]], [[A]]
---
name: vector_fmadd_fast
alignment: 4
@@ -245,7 +245,7 @@
# CHECK: [[C:%.*]]:fpr128 = COPY $q2
# CHECK-NEXT: [[B:%.*]]:fpr128 = COPY $q1
# CHECK-NEXT: [[A:%.*]]:fpr128 = COPY $q0
-# CHECK-NEXT: fpr128 = FMLAv2f64 [[C]], [[B]], [[A]]
+# CHECK-NEXT: fpr128 = contract FMLAv2f64 [[C]], [[B]], [[A]]
---
name: vector_fmadd_contract
alignment: 4
@@ -324,7 +324,7 @@
# CHECK: [[C:%.*]]:fpr128 = COPY $q2
# CHECK-NEXT: [[B:%.*]]:fpr128 = COPY $q1
# CHECK-NEXT: [[A:%.*]]:fpr128 = COPY $q0
-# CHECK-NEXT: fpr128 = FMLAv2f64 [[C]], [[B]], [[A]]
+# CHECK-NEXT: fpr128 = contract FMLAv2f64 [[C]], [[B]], [[A]]
---
name: vector_fmadd_contract_op1
Index: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -6225,6 +6225,14 @@
if (MUL)
DelInstrs.push_back(MUL);
DelInstrs.push_back(&Root);
+
+ // Set the flags on the inserted instructions to be the merged flags of the
+ // instructions that we have combined.
+ uint16_t Flags = Root.getFlags();
+ if (MUL)
+ Flags = Root.mergeFlagsWith(*MUL);
+ for (auto *MI : InsInstrs)
+ MI->setFlags(Flags);
}
/// Replace csincr-branch sequence by simple conditional branch
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