[PATCH] D118419: [AMDGPU] Allow scalar loads after barrier

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 27 16:39:25 PST 2022


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Currently we cannot convert a vector load into scalar if there
is dominating barrier or fence. It is considered a clobbering
memory access to prevent memory operations reordering. While
reordering is not possible the actual memory is not being clobbered
by a barrier or fence and we can still use a scalar load for a
uniform pointer.

The solution is not to bail on a first clobbering access but
traverse MemorySSA to the root excluding barriers and fences.


https://reviews.llvm.org/D118419

Files:
  llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
  llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll

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