[PATCH] D117796: AMDGPU: Fix LiveVariables error after lowering SI_END_CF

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

> Why do you only need to do this for phi join regs? Couldn't any random register have its last use in SplitBB?

I was thinking of a case like this:

  ---
  name:            phi_visit_order
  tracksRegLiveness: true
  body:             |
    bb.0:
      successors: %bb.3(0x40000000), %bb.1(0x40000000)
      liveins: $vgpr0
    
      %0:vgpr_32 = COPY killed $vgpr0
      %1:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
      %2:sreg_64_xexec = V_CMP_EQ_U32_e64 0, killed %0, implicit $exec
      %3:sreg_64_xexec = SI_IF %2, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
      S_BRANCH %bb.3
    
    bb.1:
      successors: %bb.2(0x80000000)
    
      %4:sreg_64_xexec = PHI %5, %bb.3, %3, %bb.0
      %6:vgpr_32 = PHI %7, %bb.3, %1, %bb.0
      S_BRANCH %bb.2
    
    bb.2:
      successors: %bb.3(0x80000000)
    
      %8:sreg_64_xexec = COPY %4
      SI_END_CF killed %8, implicit-def $exec, implicit-def dead $scc, implicit $exec
      %9:vgpr_32 = nsw V_ADD_U32_e32 1, killed %6, implicit $exec
    
    bb.3:
      successors: %bb.3(0x40000000), %bb.1(0x40000000)
    
      %10:vgpr_32 = PHI %9, %bb.2, %7, %bb.3, %1, %bb.0
      GLOBAL_STORE_DWORD undef %11:vreg_64, %10, 0, 0, implicit $exec :: (volatile store (s32), addrspace 1)
      %7:vgpr_32 = COPY killed %10
      %5:sreg_64_xexec = SI_IF %2, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
      S_BRANCH %bb.3
  
  ...

Here %4 which is not a phi join reg has its last use in bb.2. When bb.2 is split into MBB/SplitBB, %4 will be live through MBB. Rather than testing for phi join regs I think you want to do it for any register that is live into MBB.


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  https://reviews.llvm.org/D117796/new/

https://reviews.llvm.org/D117796