[llvm] 5fbc3cd - [RISCV] Use existing variable intead of calling getOperand again. NFCI

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-01-30T18:42:19-08:00
New Revision: 5fbc3cda9e25534c2174bdf03a555ccc5a6a8452

URL: https://github.com/llvm/llvm-project/commit/5fbc3cda9e25534c2174bdf03a555ccc5a6a8452
DIFF: https://github.com/llvm/llvm-project/commit/5fbc3cda9e25534c2174bdf03a555ccc5a6a8452.diff

LOG: [RISCV] Use existing variable intead of calling getOperand again. NFCI

This is a slight change because I'm using the ANY_EXTEND result
instead of the original operand, but getNode should constant fold.

While there, add a comment about why the code specifically checks
for a ConstantSDNode.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 503b8ce521161..aefccd0ae9ffb 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -6643,7 +6643,11 @@ void RISCVTargetLowering::ReplaceNodeResults(SDNode *N,
           DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(2));
       unsigned Opc =
           IntNo == Intrinsic::riscv_shfl ? RISCVISD::SHFLW : RISCVISD::UNSHFLW;
-      if (isa<ConstantSDNode>(N->getOperand(2))) {
+      // There is no (UN)SHFLIW. If the control word is a constant, we can use
+      // (UN)SHFLI with bit 4 of the control word cleared. The upper 32 bit half
+      // will be shuffled the same way as the lower 32 bit half, but the two
+      // halves won't cross.
+      if (isa<ConstantSDNode>(NewOp2)) {
         NewOp2 = DAG.getNode(ISD::AND, DL, MVT::i64, NewOp2,
                              DAG.getConstant(0xf, DL, MVT::i64));
         Opc =