[llvm] 175145e - [RISCV] Add more pack and packw test case for Zbkb. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 30 17:10:49 PST 2022
Author: Craig Topper
Date: 2022-01-30T17:10:34-08:00
New Revision: 175145e3f430a37ae32c18f1bf99a4a8e08554ce
URL: https://github.com/llvm/llvm-project/commit/175145e3f430a37ae32c18f1bf99a4a8e08554ce
DIFF: https://github.com/llvm/llvm-project/commit/175145e3f430a37ae32c18f1bf99a4a8e08554ce.diff
LOG: [RISCV] Add more pack and packw test case for Zbkb. NFC
Make sure we cover the encodings use for zext.h and other encodings
not used for zext.h.
Added:
Modified:
llvm/test/MC/RISCV/rv32zbkb-valid.s
llvm/test/MC/RISCV/rv64zbkb-valid.s
Removed:
################################################################################
diff --git a/llvm/test/MC/RISCV/rv32zbkb-valid.s b/llvm/test/MC/RISCV/rv32zbkb-valid.s
index 52a6d3b9118b..3ae804b14478 100644
--- a/llvm/test/MC/RISCV/rv32zbkb-valid.s
+++ b/llvm/test/MC/RISCV/rv32zbkb-valid.s
@@ -32,9 +32,15 @@ orn t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x40]
xnor t0, t1, t2
+# CHECK-ASM-AND-OBJ: pack t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x08]
+pack t0, t1, t2
+
+# Test the encoding used for zext.h for RV32.
# CHECK-ASM-AND-OBJ: pack t0, t1, zero
# CHECK-ASM: encoding: [0xb3,0x42,0x03,0x08]
pack t0, t1, x0
+
# CHECK-ASM-AND-OBJ: packh t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x08]
packh t0, t1, t2
diff --git a/llvm/test/MC/RISCV/rv64zbkb-valid.s b/llvm/test/MC/RISCV/rv64zbkb-valid.s
index bc3ed8e9246c..78fe090295e6 100644
--- a/llvm/test/MC/RISCV/rv64zbkb-valid.s
+++ b/llvm/test/MC/RISCV/rv64zbkb-valid.s
@@ -24,3 +24,8 @@ roriw t0, t1, 0
# CHECK-ASM-AND-OBJ: packw t0, t1, t2
# CHECK-ASM: encoding: [0xbb,0x42,0x73,0x08]
packw t0, t1, t2
+
+# Test the encoding used for zext.h
+# CHECK-ASM-AND-OBJ: packw t0, t1, zero
+# CHECK-ASM: encoding: [0xbb,0x42,0x03,0x08]
+packw t0, t1, zero
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