[llvm] 33fe087 - [M68k] Add addressing modes ARIPI and ARIPD support for BTST

[Jim Lin via llvm-commits]

Author: Jim Lin
Date: 2022-01-29T21:05:10+08:00
New Revision: 33fe0872cd54afa1fc036e0d9fdc89d65449f9ff

URL: https://github.com/llvm/llvm-project/commit/33fe0872cd54afa1fc036e0d9fdc89d65449f9ff
DIFF: https://github.com/llvm/llvm-project/commit/33fe0872cd54afa1fc036e0d9fdc89d65449f9ff.diff

LOG: [M68k] Add addressing modes ARIPI and ARIPD support for BTST

BTST missed ARIPI and ARIPD addressing modes support.

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D116580

Added: 
    

Modified: 
    llvm/lib/Target/M68k/M68kInstrBits.td
    llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s
    llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s

Removed: 
    


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diff  --git a/llvm/lib/Target/M68k/M68kInstrBits.td b/llvm/lib/Target/M68k/M68kInstrBits.td
index d610bce5c2770..0d12781023788 100644
--- a/llvm/lib/Target/M68k/M68kInstrBits.td
+++ b/llvm/lib/Target/M68k/M68kInstrBits.td
@@ -79,6 +79,10 @@ def BTST32di : MxBTST_RI<MxType32d>;
 // Memory BTST limited to 8 bits only
 def BTST8jd : MxBTST_MR<MxType8d, MxType8.JOp, MxType8.JPat,
                         MxEncEAj_0, MxExtEmpty>;
+def BTST8od : MxBTST_MR<MxType8d, MxType8.OOp, MxType8.OPat,
+                        MxEncEAo_0, MxExtEmpty>;
+def BTST8ed : MxBTST_MR<MxType8d, MxType8.EOp, MxType8.EPat,
+                        MxEncEAe_0, MxExtEmpty>;
 def BTST8pd : MxBTST_MR<MxType8d, MxType8.POp, MxType8.PPat,
                         MxEncEAp_0, MxExtI16_0>;
 def BTST8fd : MxBTST_MR<MxType8d, MxType8.FOp, MxType8.FPat,
@@ -90,6 +94,10 @@ def BTST8kd : MxBTST_MR<MxType8d, MxType8.KOp, MxType8.KPat,
 
 def BTST8ji : MxBTST_MI<MxType8d, MxType8.JOp, MxType8.JPat,
                         MxEncEAj_0, MxExtEmpty>;
+def BTST8oi : MxBTST_MI<MxType8d, MxType8.OOp, MxType8.OPat,
+                        MxEncEAo_0, MxExtEmpty>;
+def BTST8ei : MxBTST_MI<MxType8d, MxType8.EOp, MxType8.EPat,
+                        MxEncEAe_0, MxExtEmpty>;
 def BTST8pi : MxBTST_MI<MxType8d, MxType8.POp, MxType8.PPat,
                         MxEncEAp_0, MxExtI16_0>;
 def BTST8fi : MxBTST_MI<MxType8d, MxType8.FOp, MxType8.FPat,

diff  --git a/llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s b/llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s
index d9589c4a5a8bf..25270bed3b8a3 100644
--- a/llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s
+++ b/llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s
@@ -7,6 +7,20 @@ btst	#0, (%a1)
 ; CHECK-SAME: encoding: [0x08,0x10,0x00,0xff]
 btst	#-1, (%a0)
 
+; CHECK:      btst  #0, (%a1)+
+; CHECK-SAME: encoding: [0x08,0x19,0x00,0x00]
+btst	#0, (%a1)+
+; CHECK:      btst  #-1, (%a0)+
+; CHECK-SAME: encoding: [0x08,0x18,0x00,0xff]
+btst	#-1, (%a0)+
+
+; CHECK:      btst  #0, -(%a1)
+; CHECK-SAME: encoding: [0x08,0x21,0x00,0x00]
+btst	#0, -(%a1)
+; CHECK:      btst  #-1, -(%a0)
+; CHECK-SAME: encoding: [0x08,0x20,0x00,0xff]
+btst	#-1, -(%a0)
+
 ; CHECK:      btst  #0, (-1,%a1)
 ; CHECK-SAME: encoding: [0x08,0x29,0x00,0x00,0xff,0xff]
 btst	#0, (-1,%a1)

diff  --git a/llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s b/llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s
index 306fd48587ebf..15d00b89f0f4f 100644
--- a/llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s
+++ b/llvm/test/MC/M68k/Bits/Classes/MxBTST_MR.s
@@ -7,6 +7,20 @@ btst	%d0, (%a1)
 ; CHECK-SAME: encoding: [0x03,0x10]
 btst	%d1, (%a0)
 
+; CHECK:      btst  %d0, (%a1)+
+; CHECK-SAME: encoding: [0x01,0x19]
+btst	%d0, (%a1)+
+; CHECK:      btst  %d1, (%a0)+
+; CHECK-SAME: encoding: [0x03,0x18]
+btst	%d1, (%a0)+
+
+; CHECK:      btst  %d0, -(%a1)
+; CHECK-SAME: encoding: [0x01,0x21]
+btst	%d0, -(%a1)
+; CHECK:      btst  %d1, -(%a0)
+; CHECK-SAME: encoding: [0x03,0x20]
+btst	%d1, -(%a0)
+
 ; CHECK:      btst  %d0, (-1,%a1)
 ; CHECK-SAME: encoding: [0x01,0x29,0xff,0xff]
 btst	%d0, (-1,%a1)