[PATCH] D118102: [LoopInterchange] Prevent interchange with unsafe control-flow divergence inside inner loops (PR48057)

[Congzhe Cao via Phabricator via llvm-commits]

congzhe added a comment.

In D118102#3280415 <https://reviews.llvm.org/D118102#3280415>, @Meinersbur wrote:

> As mentioned in the LoopWG call, I don't think this has anything to do with dominance relations or diverging branches. Instead `store i16 %conv9.i, i16* @e` may be executed multiple times and the last written value written to `@e` must the value stored after the loop (the problem should occur even if the store is executed every time, i.e. not diverging). This is a classic output-dependency (write-after-write). I suggest to have a look at the dependency analysis and why it missed this case.

Thanks Michael! I did look futher into it, and I do agree that there is output dependency that writes into @e in each iteration. Nevertheless if the store is executed every time (not diverging), IMHO if I'm not mistaken, it seems that this output dependency does not invalid loop interchange since we only care about the final value written into @e, which is the value of array b[d][0] at the final interation. This value b[d=0][0] does not change before and after interchange. So the output dependence is this example seems to be okay, please correct me if I'm wrong.

Regarding dependency analysis: for this example (e.g., `test1()` in `pr48057.ll`), no dependence is detected, since for all mem instructions (on lines 57, 63 ,65 in `pr48057.ll`), the memory locations do not alias.

I'd appreciate if you could let me know if what I said makes sense to you, thank you very much!


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