[PATCH] D118420: [AArch64] Add isel for bitcasting between bfloat and half types.

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:7553
 
+def : Pat<(f16 (bitconvert (bf16 FPR16:$src))), (f16 FPR16:$src)>;
+def : Pat<(bf16 (bitconvert (f16 FPR16:$src))), (bf16 FPR16:$src)>;
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mgabka wrote:
> shouldn't it be guarded by HasBF16 ?
No, generally only instructions need to be guarded by feature flags.  This mirrors how we handle bf16 patterns for SVE for things like bitcasts, loads, stores and shuffles because for each of those cases, how the bits are interpreted is not significant.

If it turns out that for some reason the bf16 type is not legal then these patterns will just get ignored.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118420/new/

https://reviews.llvm.org/D118420