[llvm] a4aaa59 - [Test] Add 'ne' tests for and-reduce pattern folding

[Max Kazantsev via llvm-commits]

Author: Max Kazantsev
Date: 2022-01-28T11:47:05+07:00
New Revision: a4aaa5995308ac2ba1bf180c9ce9c321cdb9f28a

URL: https://github.com/llvm/llvm-project/commit/a4aaa5995308ac2ba1bf180c9ce9c321cdb9f28a
DIFF: https://github.com/llvm/llvm-project/commit/a4aaa5995308ac2ba1bf180c9ce9c321cdb9f28a.diff

LOG: [Test] Add 'ne' tests for and-reduce pattern folding

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/reduction-and-sext-zext-i1.ll
    llvm/test/Transforms/InstCombine/reduction-or-sext-zext-i1.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/reduction-and-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-and-sext-zext-i1.ll
index 96d650068f279..a38d26b1f8bf5 100644
--- a/llvm/test/Transforms/InstCombine/reduction-and-sext-zext-i1.ll
+++ b/llvm/test/Transforms/InstCombine/reduction-and-sext-zext-i1.ll
@@ -139,6 +139,50 @@ bb:
   ret i1 %all_eq
 }
 
+define i1 @reduce_and_pointer_cast_ne(i8* %arg, i8* %arg1) {
+; CHECK-LABEL: @reduce_and_pointer_cast_ne(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i8* [[ARG1:%.*]] to i64*
+; CHECK-NEXT:    [[LHS1:%.*]] = load i64, i64* [[TMP0]], align 8
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i8* [[ARG:%.*]] to i64*
+; CHECK-NEXT:    [[RHS2:%.*]] = load i64, i64* [[TMP1]], align 8
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne i64 [[LHS1]], [[RHS2]]
+; CHECK-NEXT:    ret i1 [[TMP2]]
+;
+bb:
+  %ptr1 = bitcast i8* %arg1 to <8 x i8>*
+  %ptr2 = bitcast i8* %arg to <8 x i8>*
+  %lhs = load <8 x i8>, <8 x i8>* %ptr1
+  %rhs = load <8 x i8>, <8 x i8>* %ptr2
+  %cmp = icmp eq <8 x i8> %lhs, %rhs
+  %all_eq = call i1 @llvm.vector.reduce.and.v8i32(<8 x i1> %cmp)
+  %any_ne = xor i1 %all_eq, 1
+  ret i1 %any_ne
+}
+
+define i1 @reduce_and_pointer_cast_ne_wide(i8* %arg, i8* %arg1) {
+; CHECK-LABEL: @reduce_and_pointer_cast_ne_wide(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[PTR1:%.*]] = bitcast i8* [[ARG1:%.*]] to <8 x i16>*
+; CHECK-NEXT:    [[PTR2:%.*]] = bitcast i8* [[ARG:%.*]] to <8 x i16>*
+; CHECK-NEXT:    [[LHS:%.*]] = load <8 x i16>, <8 x i16>* [[PTR1]], align 16
+; CHECK-NEXT:    [[RHS:%.*]] = load <8 x i16>, <8 x i16>* [[PTR2]], align 16
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <8 x i16> [[LHS]], [[RHS]]
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i8 [[TMP0]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+bb:
+  %ptr1 = bitcast i8* %arg1 to <8 x i16>*
+  %ptr2 = bitcast i8* %arg to <8 x i16>*
+  %lhs = load <8 x i16>, <8 x i16>* %ptr1
+  %rhs = load <8 x i16>, <8 x i16>* %ptr2
+  %cmp = icmp eq <8 x i16> %lhs, %rhs
+  %all_eq = call i1 @llvm.vector.reduce.and.v8i32(<8 x i1> %cmp)
+  %any_ne = xor i1 %all_eq, 1
+  ret i1 %any_ne
+}
+
 declare i1 @llvm.vector.reduce.and.v8i32(<8 x i1> %a)
 declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %a)
 declare i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %a)

diff  --git a/llvm/test/Transforms/InstCombine/reduction-or-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-or-sext-zext-i1.ll
index 486a7297db29b..35174d4321565 100644
--- a/llvm/test/Transforms/InstCombine/reduction-or-sext-zext-i1.ll
+++ b/llvm/test/Transforms/InstCombine/reduction-or-sext-zext-i1.ll
@@ -141,6 +141,51 @@ bb:
   ret i1 %all_eq
 }
 
+
+define i1 @reduce_or_pointer_cast_ne(i8* %arg, i8* %arg1) {
+; CHECK-LABEL: @reduce_or_pointer_cast_ne(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[PTR1:%.*]] = bitcast i8* [[ARG1:%.*]] to <8 x i8>*
+; CHECK-NEXT:    [[PTR2:%.*]] = bitcast i8* [[ARG:%.*]] to <8 x i8>*
+; CHECK-NEXT:    [[LHS:%.*]] = load <8 x i8>, <8 x i8>* [[PTR1]], align 8
+; CHECK-NEXT:    [[RHS:%.*]] = load <8 x i8>, <8 x i8>* [[PTR2]], align 8
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <8 x i8> [[LHS]], [[RHS]]
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i8 [[TMP0]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+bb:
+  %ptr1 = bitcast i8* %arg1 to <8 x i8>*
+  %ptr2 = bitcast i8* %arg to <8 x i8>*
+  %lhs = load <8 x i8>, <8 x i8>* %ptr1
+  %rhs = load <8 x i8>, <8 x i8>* %ptr2
+  %cmp = icmp ne <8 x i8> %lhs, %rhs
+  %any_ne = call i1 @llvm.vector.reduce.or.v8i32(<8 x i1> %cmp)
+  ret i1 %any_ne
+}
+
+define i1 @reduce_or_pointer_cast_ne_wide(i8* %arg, i8* %arg1) {
+; CHECK-LABEL: @reduce_or_pointer_cast_ne_wide(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[PTR1:%.*]] = bitcast i8* [[ARG1:%.*]] to <8 x i16>*
+; CHECK-NEXT:    [[PTR2:%.*]] = bitcast i8* [[ARG:%.*]] to <8 x i16>*
+; CHECK-NEXT:    [[LHS:%.*]] = load <8 x i16>, <8 x i16>* [[PTR1]], align 16
+; CHECK-NEXT:    [[RHS:%.*]] = load <8 x i16>, <8 x i16>* [[PTR2]], align 16
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <8 x i16> [[LHS]], [[RHS]]
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i8 [[TMP0]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+bb:
+  %ptr1 = bitcast i8* %arg1 to <8 x i16>*
+  %ptr2 = bitcast i8* %arg to <8 x i16>*
+  %lhs = load <8 x i16>, <8 x i16>* %ptr1
+  %rhs = load <8 x i16>, <8 x i16>* %ptr2
+  %cmp = icmp ne <8 x i16> %lhs, %rhs
+  %any_ne = call i1 @llvm.vector.reduce.or.v8i32(<8 x i1> %cmp)
+  ret i1 %any_ne
+}
+
 declare i1 @llvm.vector.reduce.or.v8i32(<8 x i1> %a)
 declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %a)
 declare i64 @llvm.vector.reduce.or.v8i64(<8 x i64> %a)