[PATCH] D118376: [x86] try harder to scalarize a vector load with extracted integer op uses

[Sanjay Patel via Phabricator via llvm-commits]

spatel marked an inline comment as done.
spatel added inline comments.


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Comment at: llvm/test/CodeGen/X86/pr45378.ll:80
 ; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
-; SSE2-NEXT:    movq %xmm0, %rcx
-; SSE2-NEXT:    testq %rcx, %rax
+; SSE2-NEXT:    movq %xmm0, %rax
+; SSE2-NEXT:    testq %rax, (%rdi)
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RKSimon wrote:
> We might be able to get this as well if you can move the fold inside combineExtractWithShuffle ?
With only SSE2 (but not the other RUNs), the extract of element 1 is not legal, so it becomes a shuffle before we see it. 

We might be able to adjust the isAfterLegalizeDAG predicate and get this, but that could also lead to unintended diffs. I'd prefer to go with the more conservative approach at first, so we don't jeopardize fixing the motivating bug.


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https://reviews.llvm.org/D118376