[PATCH] D118376: [x86] try harder to scalarize a vector load with extracted integer op uses

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 27 09:09:59 PST 2022


RKSimon added a comment.

Thanks for taking this on!

The loss of the shuffles is my main concern - I don't think EltsFromConsecutiveLoads can help us recover from this yet :(



================
Comment at: llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll:1725
+; CHECK-NEXT:    vpinsrd $3, 8(%rdi), %xmm0, %xmm0
 ; CHECK-NEXT:    retq
   %vec = load <16 x i32>, <16 x i32>* %vp
----------------
yuck


================
Comment at: llvm/test/CodeGen/X86/pr45378.ll:80
 ; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
-; SSE2-NEXT:    movq %xmm0, %rcx
-; SSE2-NEXT:    testq %rcx, %rax
+; SSE2-NEXT:    movq %xmm0, %rax
+; SSE2-NEXT:    testq %rax, (%rdi)
----------------
We might be able to get this as well if you can move the fold inside combineExtractWithShuffle ?


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  https://reviews.llvm.org/D118376/new/

https://reviews.llvm.org/D118376



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