[PATCH] D118372: [SVE] Fix TypeSize->uint64_t implicit conversion in visitAlloca()

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:4028
+      DAG.getNode(ISD::MUL, dl, IntPtr, AllocSize,
+                  DAG.getConstant(TySize.getKnownMinValue(), dl, IntPtr));
 
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Hi @kmclaughlin, I think the known min value needs multiplying by vscale here. You can use DAG.getVScale() to do this I think.


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Comment at: llvm/test/CodeGen/AArch64/sve-alloca.ll:5
+
+; CHECK-LABEL: @foo
+define void @foo(<vscale x 4 x i64> %dst, i1 %cond) {
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It would be good to add some check lines for the stack allocation here too if possible?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118372/new/

https://reviews.llvm.org/D118372