[llvm] d77c7c8 - AMDGPU: Fix broken check lines in test

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2022-01-27T11:01:44-05:00
New Revision: d77c7c80d1166ce569b864d49fa4797d5a402fcf

URL: https://github.com/llvm/llvm-project/commit/d77c7c80d1166ce569b864d49fa4797d5a402fcf
DIFF: https://github.com/llvm/llvm-project/commit/d77c7c80d1166ce569b864d49fa4797d5a402fcf.diff

LOG: AMDGPU: Fix broken check lines in test

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll b/llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
index 80dc38cef421..65f0fcb1dc8b 100644
--- a/llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
@@ -303,10 +303,10 @@ define amdgpu_vs float @load_addr_no_fold(i32 addrspace(6)* inreg noalias %p0) #
   ret float %r2
 }
 
-; CHECK-LABEL: {{^}}vgpr_arg_src:
-; CHECK: v_readfirstlane_b32 s[[READLANE:[0-9]+]], v0
-; CHECK: s_mov_b32 s[[ZERO:[0-9]+]]
-; CHECK: s_load_dwordx4 s{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[READLANE]]:[[ZERO]]{{\]}}
+; GCN-LABEL: {{^}}vgpr_arg_src:
+; GCN: v_readfirstlane_b32 s[[READLANE:[0-9]+]], v0
+; GCN: s_mov_b32 s[[ZERO:[0-9]+]]
+; GCN: s_load_dwordx4 s{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[READLANE]]:[[ZERO]]{{\]}}
 define amdgpu_vs float @vgpr_arg_src(<4 x i32> addrspace(6)* %arg) {
 main_body:
   %tmp9 = load <4 x i32>, <4 x i32> addrspace(6)* %arg